Spacer Lithography for Ultrafine Semiconductor Patterns
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Solution Overview
Problem
Conventional semiconductor fabrication techniques face challenges in achieving high dimensional accuracy and manufacturing throughput for ultrafine design features in the deep sub-micron range, particularly due to limitations in lithography systems and the inefficiencies of double exposure techniques and chemical mechanical polishing (CMP), which result in reduced yield and increased costs.
Innovation Solution
A method involving the formation of a first photoresist mask pattern with a cross-linkable layer, where acid is generated to form a cross-linked spacer, allowing for the creation of a second mask pattern using the cross-linked spacer for precise etching of target layers, thereby enabling the formation of ultrafine features with high accuracy and throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography techniques are used to form ultrafine design features, then manufacturing throughput can be maintained, but dimensional accuracy deteriorates due to chemical and optical limits
Solution Approach 1:
The fabrication process is divided into multiple stages: first forming a mandrel pattern, then creating a spacer layer that is selectively removed, and finally forming the second pattern. This segmentation allows each step to be optimized independently, achieving both high precision in the spacer formation and maintained throughput through efficient process integration.
Solution Approach 2:
The mandrel pattern is formed in advance with precise dimensions, and the spacer layer is prepared with predetermined thickness and material properties. These preliminary actions establish the foundation for achieving ultrafine dimensional accuracy in the final pattern without requiring additional high-precision lithography steps.
2Manufacturing precision
If double exposure techniques are used to achieve ultrafine features, then dimensional accuracy improves, but manufacturing throughput deteriorates due to multiple tool transitions and CMP steps
Solution Approach 1:
The patent combines the mandrel formation and spacer formation into a single integrated process flow that can be completed in one tool. The spacer layer is formed and patterned using the same lithography and etching equipment that forms the mandrel, eliminating the need to transport wafers between different tools and thereby maintaining high manufacturing throughput.
Solution Approach 2:
The spacer layer is selectively removed from specific regions where it is not needed, allowing the mandrel to be completely removed afterward. This extraction of the spacer material in controlled regions enables the formation of the final pattern with ultrafine accuracy while avoiding the need for multiple exposure steps.
3Manufacturing precision
If frequent CMP steps are used in double exposure processes, then pattern alignment improves, but manufacturing throughput deteriorates due to time consumption
Solution Approach 1:
The spacer layer is formed with self-aligned precision relative to the mandrel pattern, eliminating the need for additional alignment steps. The spacer material automatically conforms to the mandrel geometry, providing inherent alignment accuracy without requiring time-consuming CMP or re-alignment procedures.
4Manufacturing precision
If multiple tools are used for double exposure techniques, then ultrafine feature formation improves, but manufacturing throughput deteriorates due to wafer transportation
Solution Approach 1:
A single lithography tool is designed to perform multiple functions: forming the mandrel pattern, depositing the spacer layer, patterning the spacer, and removing materials. This multi-functional approach maintains ultrafine feature formation capability while eliminating wafer transportation between tools, thereby preserving high manufacturing throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the efficient fabrication of semiconductor devices with accurately formed features in the deep sub-micron range, such as less than 35 nm, by minimizing the need for multiple exposures and CMP, thereby enhancing manufacturing efficiency and reducing chip rejection rates.
Implementation Method 1
forming a cross-linkable layer, comprising a material capable of undergoing a cross-linking reaction in the presence of an acid; generating an acid in the first photoresist mask pattern by heating or irradiation; heating to diffuse the acid to the cross-linkable layer to form a cross-linked spacer
Implementation Method 2
heating to diffuse the acid to the cross-linkable layer to form a cross-linked spacer on the upper and side surfaces of the first photoresist mask pattern
Data Source
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AI summary
Ultrafine dimensions are accurately and efficiently formed in a target layer (11) using a spacer lithographic technique comprising forming a first mask pattern (10), forming a cross-linkable layer (20) over the first mask pattern (10), forming a cross-linked spacer (30,31) between the first mask pattern (20) and cross-linkable layer (20), removing the cross-linkable layer (20), cross-linked spacer (30) from the upper surface of the first mask pattern (10) and the first mask pattern (10) to form a second mask pattern comprising remaining portions of the cross-linked spacer (31), and etching using the second mask pattern (31) to form an ultrafine pattern in the underlying target layer (11). Embodiments include forming the first mask pattern (10) from a photoresist material capable of generating an acid, depositing a cross-linkable material (20) comprising a material capable of undergoing a cross-linking reaction in the presence of an acid, and removing portions of the non-cross-linked layer (20) and cross-linked spacer (30) from the upper surface of the first mask pattern (10) before removing the remaining portions of the first mask pattern (10) and remaining noncross-linked layer (20).