Sub-Resolution Patterning via Spacer-Assisted Mask Alignment
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Solution Overview
Problem
The miniaturization of semiconductor devices poses challenges for conventional photolithography techniques, which struggle to form patterned structures with sub-resolution spacing, leading to increased manufacturing complexity and costs due to the need for different processes and shapes in various regions.
Innovation Solution
A patterning method involving multiple photolithography processes to form specific mask patterns with spacers, allowing for the precise arrangement of sub-patterns with varying pitches and distances, overcoming exposure resolution limitations and misalignment issues by dividing the pattern into layout combinations and using spacers to prevent adjacent pattern connections during misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional exposure techniques are used for miniaturized semiconductor devices, then manufacturing process is simple, but exposure resolution is insufficient to form patterns with sub-resolution spacing
Solution Approach 1:
The pattern is divided into multiple layout combinations that can be formed by different photolithography processes. Each layout combination corresponds to a specific pitch requirement, allowing patterns with different spacing requirements to be manufactured using appropriate exposure techniques for each segment.
Solution Approach 2:
The patent introduces a vertical dimension by forming spacers on top of mask patterns. This allows the formation of additional patterns (second and third sub patterns) that are positioned at different heights and horizontal positions, effectively creating patterns with sub-resolution spacing through a multi-dimensional approach rather than relying solely on horizontal resolution.
2Manufacturing precision
If different photolithography processes are used for different regions with different shapes and dimensions, then pattern formation precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent creates a universal manufacturing approach where spacer formation serves multiple functions: it defines pattern boundaries, provides mechanical support, and enables sub-resolution pattern formation. This multi-functional approach allows a single spacer formation process to replace what would otherwise require multiple specialized photolithography processes for different pattern regions.
Solution Approach 2:
The spacer structures are self-aligned to the mask patterns, automatically positioning themselves at the correct locations and orientations. This self-alignment mechanism eliminates the need for complex alignment procedures and multiple exposure steps, reducing manufacturing complexity while maintaining high pattern formation precision.
3Reliability
If spacers are formed to prevent adjacent pattern connections, then manufacturing yield is improved, but process steps are increased
Solution Approach 1:
Spacers are formed in advance during the mask pattern formation process, before the actual pattern transfer occurs. This preliminary spacer formation ensures that pattern separation is established early in the manufacturing process, preventing adjacent patterns from connecting during subsequent processing steps and improving manufacturing yield.
Solution Approach 2:
The patent combines multiple functions into the spacer formation step: the spacers simultaneously serve as pattern definition elements, alignment references, and physical barriers preventing pattern connection. By merging these functions into a single process step, the patent improves manufacturing yield without proportionally increasing the total number of process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves manufacturing yield and increases the process window by enabling precise control over pattern formation, even at sub-resolution spacings, simplifying the manufacturing process and reducing costs.
Implementation Method 1
The photolithography process is configured to form designed patterns such as circuit layout patterns on one or more photomasks, and then to precisely transfer such patterns to a photoresist layer on a film by exposure and development steps
Implementation Method 2
The pattern of the first mask pattern and the second mask pattern is transferred to the material layer by an etching process
Data Source
AI summary
A patterning method includes the following steps. A mask layer is formed on a material layer. A first hole is formed in the mask layer by a first photolithography process. A first mask pattern is formed in the first hole. A second hole is formed in the mask layer by a second photolithography process. A first spacer is formed on an inner wall of the second hole. A second mask pattern is formed in the second hole after the step of forming the first spacer. The first spacer surrounds the second mask pattern in the second hole. The mask layer and the first spacer are removed. The pattern of the first mask pattern and the second mask pattern are transferred to the material layer by an etching process.