Spacer Sidewalls Self-Isolate Array Feature Spaces
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Solution Overview
Problem
Conventional pitch reduction processes in semiconductor device fabrication require a second masking level to isolate spaces between features, which increases complexity and costs.
Innovation Solution
The method involves forming spacer sidewalls that self-isolate spaces between features during the pitch doubling process by depositing a spacer material that comes into contact and fills the ends of these spaces, eliminating the need for a second lithography process and masking level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a second masking level is used to isolate spaces between features during pitch doubling, then isolation of spaces is achieved, but process complexity and fabrication costs increase
Solution Approach 1:
The spacer material is deposited to a thickness that causes it to self-contact and fill the ends of spaces between features, automatically isolating these spaces without requiring an additional masking level. This self-service mechanism eliminates the need for the second lithography process while achieving complete space isolation.
Solution Approach 2:
The spacer material thickness is precisely controlled to be greater than or equal to one-half the width of the ends of spaces between features. This parameter change enables the spacer material to extend beyond the sidewalls and fill the space ends, achieving isolation through dimensional control rather than additional process steps.
2Reliability
If spacer material thickness is increased to fill space ends, then space isolation is achieved, but material usage and deposition complexity increase
Solution Approach 1:
The spacer material is deposited to a thickness that is excessive relative to the sidewall height but precisely controlled to be at least one-half the width of the space ends. This partial excess ensures complete filling of space ends for reliable isolation while avoiding unnecessary material deposition that would increase complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the pitch doubling process, reduces fabrication costs, and maintains the desired feature density by achieving pitch reduction without additional masking levels, thereby enhancing the efficiency of semiconductor device manufacturing.
Implementation Method 1
A spacer material is formed over the features and the target material
Implementation Method 2
The spacer material is anisotropically removed to form spacer sidewalls
Data Source
AI summary
Methods of isolating spaces formed between features in an array during a pitch reduction process and semiconductor device structures having the same. In one embodiment, ends of the features are wider than middle regions of the features. During the pitch reduction process, spacer sidewalls formed between adjacent ends of the features come into substantial contact with one another, isolating the spaces between the features. In another embodiment, the features have a single width and an additional feature is located near ends of the features. Spacer sidewalls formed between adjacent features and the additional feature come into substantial contact with one another, isolating the spaces between the features.