SPAD Optoelectronic Device Biasing for Charge Acceleration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing optoelectronic devices with single-photon avalanche diodes (SPADs) face challenges in efficiently accelerating charges and maintaining low power dissipation while ensuring minimal unwanted jitter and high pixel density.
Innovation Solution
The device employs a specific structure and biasing voltage application to generate an electric field that accelerates charges, using a substrate with insulated conductive walls and conductive pads to manage current flow, and a transparent conducting layer to apply a controlled biasing voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a biasing voltage is applied to accelerate charges in the SPAD, then charge attraction to cathode is improved, but power dissipation increases
Solution Approach 1:
The patent applies different doping types and concentrations in different regions (first region with first doping type, second region with second doping type) to create localized electric fields that accelerate charges efficiently while confining high field regions to minimize overall power dissipation
Solution Approach 2:
The patent optimizes the biasing voltage parameters and doping concentrations to achieve the minimum voltage required for charge acceleration, thereby reducing power dissipation while maintaining effective charge attraction speed
2Speed
If the second region extends from first face to second face of substrate, then charge acceleration path is improved, but device complexity increases
Solution Approach 1:
The patent divides the second region into two parts: a first part extending from the first face and a second part extending to the second face, separated by a depletion region. This segmentation allows charge acceleration without requiring a single continuous complex structure
Solution Approach 2:
The patent utilizes the vertical dimension by extending the second region through the substrate thickness, creating a three-dimensional charge acceleration path that improves drift velocity without increasing planar device complexity
3Quantity of substance
If multiple SPADs are integrated in substrate, then pixel density is improved, but charge isolation becomes difficult
Solution Approach 1:
The patent merges the isolation function into the common substrate structure by forming a shared depletion region that separates charges from multiple SPADs simultaneously, reducing the need for individual isolation structures for each pixel
Solution Approach 2:
The second region with opposite doping type serves multiple functions: it accelerates charges within each SPAD, creates depletion regions for charge isolation between adjacent pixels, and provides a common structural framework for multiple SPAD integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances charge attraction to the cathode, reduces power dissipation, and maintains high pixel density by optimizing electric field generation and current control, thereby minimizing jitter and power consumption.
Implementation Method 1
the application of a biasing voltage to the third region in order to generate an electric field that accelerates the charges generated in the diode
Implementation Method 2
A photodiode is a semiconductor component able to detect rays in the optical domain and turn them into an electric signal
Implementation Method 3
SPADs are avalanche photodiodes that are operated above the breakdown voltage and a photon that reaches the multiplication area can alone initiate an avalanche and lead to the breakdown of the junction
Data Source
AI summary
The present disclosure relates to a process to control an optoelectronic device comprising a single-photon avalanche diode n a substrate, wherein the diode comprises a first region doped with a first type of conductivity level with a first face of the substrate and a second region doped with a second type of conductivity extending from the first face to a second face of the substrate opposed to the first face, wherein the device comprises a third conducting or semiconducting region at the second face, wherein the process comprises the application of a biasing voltage to the third region in order to generate an electric field that accelerates the charges generated in the diode.