SPAD Photodiode Control Circuit for Fast Quenching and Reset
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional SPAD photodiode control circuits face challenges in efficiently quenching avalanches and resetting the photodiode, which affects detection speed and power consumption, as the current reset duration is influenced by the intensity of the current source, leading to a trade-off between avalanche detection speed and power consumption.
Innovation Solution
A SPAD photodiode control circuit is designed with a feedback mechanism that includes a second current source, a current mirror, and a feedback circuit capable of controlling the second current source to an active or inactive state, introducing a delay after avalanche triggering to optimize the reset phase, thereby improving the photodiode's readiness for the next event while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional quenching circuit is used, then the avalanche can be quenched, but the resetting phase duration increases and detection speed decreases
Solution Approach 1:
The circuit dynamically adjusts the quenching current through a transistor whose resistance changes based on the voltage across the photodiode. During avalanche, the voltage drop triggers the transistor to conduct, automatically increasing quenching current without external control signals, thus reducing resetting phase duration while maintaining detection speed.
Solution Approach 2:
The circuit employs voltage feedback across the photodiode to control the quenching transistor. The voltage across the diode directly modulates the transistor's conduction state, creating a self-regulating feedback mechanism that optimizes quenching speed and reduces resetting time without compromising detection capability.
2Speed
If higher quenching current is applied, then avalanche quenching is faster, but power consumption increases
Solution Approach 1:
The quenching transistor's dynamic resistance adjustment ensures high quenching current is applied only when necessary (during avalanche conditions), rather than continuously. This dynamic behavior achieves fast quenching speed while minimizing overall power consumption by maintaining low current during normal operation.
Solution Approach 2:
The circuit changes the electrical parameters (current and resistance) based on operational state. The transistor's resistance parameter dynamically shifts from high (low power) to low (high quenching current) depending on whether an avalanche is occurring, optimizing both speed and power efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed control circuit enhances the speed of the photodiode reset phase and reduces power consumption by allowing for a controlled waveform during the reset, preventing parasitic retriggering and optimizing the detection speed, thus improving the overall performance of single-photon detection systems.
Implementation Method 1
A SPAD photodiode is essentially formed by a PN junction reverse biased at a voltage greater than its avalanche threshold. When a photogenerated electric charge is injected into the depletion area, if the displacement speed of this charge in the depletion area is sufficiently high, that is, if the electric field in the depletion area is sufficiently intense, the photodiode is capable of avalanching.
Implementation Method 2
When a photogenerated electric charge is injected into the depletion area... A single photon is thus capable of generating a measurable electric signal
Data Source
AI summary
The present disclosure concerns a SPAD photodiode control circuit, including: a first current source; a current mirror including an input transistor in series with the first current source and an output transistor in series with the SPAD photodiode and a second current source in series with the input transistor of the current mirror and in parallel with the first current source, the second current source being alternately controllable to a so-called inactive state where it delivers no current and to a so-called active state where it delivers a non-zero current which adds, in the input transistor of the current mirror, to a current delivered by the first current source.