SPAD Pixel Trench Contact Layout for Stable Avalanche Gain
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Solution Overview
Problem
The generation of avalanche amplification in single photon avalanche diodes (SPADs) is hindered by the tunneling effect caused by a strong electric field between the PN junction region and the contact, leading to recombination of photoelectrically generated electron-hole pairs, and increasing the distance between contacts to avoid this effect results in increased pixel size and decreased resolution.
Innovation Solution
A solid-state imaging device with a grid-shaped trench structure in the semiconductor substrate, where the photoelectric conversion elements have a specific configuration of semiconductor regions and contacts, including a first contact at the bottom of a trench and a second contact on the surface, with the height of the first contact differing from that of a third semiconductor region, allowing for stable avalanche amplification without increasing pixel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between contacts is increased to avoid the tunneling effect, then the tunneling effect is suppressed, but the pixel size increases and resolution decreases
Solution Approach 1:
The patent resolves this contradiction by moving the contact interaction to the vertical dimension through the trench structure. The first contact is positioned at the bottom of the trench while the second contact remains at the surface, creating a vertical separation that suppresses tunneling without requiring increased lateral distance between contacts. This maintains compact pixel dimensions and preserves high resolution.
2Reliability
If a high-concentration impurity region is formed in the contact region to create a low resistance ohmic contact, then the contact resistance is reduced, but the tunneling effect is enhanced due to the strong electric field
Solution Approach 1:
The patent applies local quality by creating a high-concentration impurity region specifically at the contact interface at the bottom of the trench, while maintaining different impurity concentrations in other regions. This localized high-concentration region provides low resistance contact without extending the strong electric field throughout the entire structure, thereby reducing tunneling effect while achieving low contact resistance where needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the tunneling effect, enabling stable avalanche amplification while maintaining high resolution by optimizing the contact geometry and semiconductor region layout.
Implementation Method 1
a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the first semiconductor substrate, and is configured to photoelectrically convert incident light to generate charges
Implementation Method 2
a single photon avalanche diode (SPAD) has been developed that amplifies a charge generated by photoelectric conversion by avalanche multiplication (also referred to as avalanche amplification) and outputs the amplified charge as an electric signal. The avalanche amplification is a phenomenon in which electrons accelerated by an electric field collide with lattice atoms in an impurity diffusion region of a PN junction to cut bonds of the lattice atoms
Data Source
AI summary
To stably generate avalanche amplification while suppressing a reduction in resolution. A solid-state imaging device according to an embodiment includes a photoelectric conversion region in an element region defined by a trench in a semiconductor substrate, a first semiconductor region surrounding the photoelectric conversion region, a first contact that contacts the first semiconductor region at a bottom of the trench, a second semiconductor region contacting the first semiconductor region and having a first conductivity type the same as the first semiconductor region, a third semiconductor region that contacts the second semiconductor region, between the second semiconductor region and a first surface, and having a second conductivity type, and a second contact on the first surface and contacting the third semiconductor region, wherein a height of the first contact from the first surface is different from a height of the third semiconductor region from the first surface.


