SPAD Deep Trench Isolation for Crosstalk and Pixel Overlay Limits

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing processes for fabricating single-photon avalanche diodes face challenges such as overlay errors between the top metal layer and the device features, and process variations that restrict pixel size, particularly in backside-illuminated designs.

Innovation Solution

A structure and method for forming a single-photon avalanche diode that includes a semiconductor layer with p-n junctions, an interlayer dielectric layer, and a deep trench isolation region with a conductor layer and dielectric liner, which reduces optical and electrical crosstalk and eliminates the need for a metal grid, thereby improving pixel size and reducing overlay errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a top metal layer is used for device biasing in backside-illuminated single-photon avalanche diodes, then device biasing is achieved, but overlay errors occur between the top metal layer and device features

Engineering Contradiction:
Improvedevice biasingVSAvoidoverlay errors
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent removes the top metal layer from the device structure entirely. Instead of using a metal grid for biasing, the invention employs a p-type semiconductor layer that extends across the substrate and makes electrical contact through side walls of the device structure, eliminating overlay alignment requirements between metal layers and device features.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/electrical system of top metal layer biasing with a semiconductor-based biasing system. The p-type semiconductor layer serves as both a structural component and a biasing element, eliminating the need for separate metal interconnect layers and their associated alignment constraints.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If process variations are reduced to improve pixel size, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:
Improvepixel size controlVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The p-type semiconductor layer serves multiple functions simultaneously: it provides structural support, establishes electrical biasing, defines pixel boundaries, and enables light detection. This multi-functionality reduces the number of separate components needed, thereby simplifying the overall device structure while maintaining precise pixel size control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Object-affected harmful factors

If deep trench isolation region with conductor layer is implemented, then optical and electrical crosstalk is reduced, but device complexity increases

Engineering Contradiction:
Improveoptical and electrical crosstalkVSAvoidisolation structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor substrate into discrete pixel regions using deep trench isolation structures. Each pixel is separated by trenches filled with dielectric material and lined with conductive material, creating electrically and optically isolated segments that prevent crosstalk between adjacent pixels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric material in the deep trench isolation regions serves as an intermediary barrier between adjacent pixels. This intermediate layer blocks both optical photons and electrical fields from crossing pixel boundaries, effectively preventing crosstalk while maintaining a relatively simple overall structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the performance of single-photon avalanche diodes by reducing optical and electrical crosstalk, allowing for precise pixel formation and improved detection capabilities without the limitations of traditional metal grid overlay errors and process variations.

Implementation Method 1

The dielectric liner is arranged to surround the sidewall of the conductor layer

Methodology Applied
Scientific EffectElectrical isolation: Dielectric

Implementation Method 2

A single-photon avalanche diode can detect single photons providing short duration current pulses

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 3

photon-initiated charge carriers are accelerated by the electric field to a kinetic energy that is large enough to knock electrons out of atoms of the bulk material and generate additional charge carriers that may exponentially grow to generate an avalanche of charge carriers

Methodology Applied
Scientific EffectImpact ionization: Ionisation

Data Source

PatentUS12183754B2Single-photon avalanche diodes with deep trench isolation
Publication Date: 2024.12.31 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US12183754B2 patent drawing
  • US12183754B2 patent drawing
  • US12183754B2 patent drawing

AI summary

Structures for a single-photon avalanche diode and methods of forming a structure for a single-photon avalanche diode. The structure includes a semiconductor layer having a first well and a second well defining a p-n junction with the first well, and an interlayer dielectric layer on the semiconductor layer. A deep trench isolation region includes a conductor layer and a dielectric liner. The conductor layer penetrates through the semiconductor layer and the interlayer dielectric layer. The conductor layer has a first end, a second end, and a sidewall that connects the first end to the second end. The dielectric liner is arranged to surround the sidewall of the conductor layer. A metal feature is connected to the first end of the conductor layer.