Spare-Channel DBI Encoding in Stacked Memory Buses
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Solution Overview
Problem
Implementing Data Bus Inversion (DBI) in a memory system using Through-Wafer Interconnects (TWIs) poses challenges due to the complexity and space requirements of adding additional TWI-based channels for DBI signals, which complicates the design and manufacture of vertically-stacked memory modules.
Innovation Solution
The solution involves utilizing spare channels in the TWI-based bus to carry DBI bits, allowing DBI to be applied across the bus without adding extra TWI channels, by rerouting data signals and enabling DBI encoding and decoding circuitry to assess and invert data signals based on DBI algorithms, thereby optimizing power consumption and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional TWI channels are added to carry DBI signals, then DBI functionality is achieved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies multi-functionality by enabling spare TWI channels to serve dual purposes: either rerouting data signals from faulty channels or carrying DBI bits for encoding functionality. This allows the same physical infrastructure to support multiple operational modes without requiring dedicated separate channels for each function, thereby achieving DBI reliability benefits without proportionally increasing device complexity.
Solution Approach 2:
The system implements self-service by using existing spare TWI channels within the bus structure to carry DBI bits, rather than requiring external or additional dedicated signaling infrastructure. The memory module utilizes its own internal unused resources (spare channels) to provide the encoding functionality, eliminating the need for additional manufacturing complexity.
2Use of energy by moving object
If spare channels are used for DBI signaling, then power consumption is reduced through DBI algorithms, but channel availability for data rerouting decreases
Solution Approach 1:
The patent implements dynamics by making the function of spare channels configurable and changeable based on system needs. The channels can dynamically switch between carrying data signals (for fault tolerance) and carrying DBI bits (for power optimization), depending on whether faulty channels are detected and whether DBI encoding is activated. This dynamic allocation allows the system to optimize for either power consumption or fault tolerance as conditions require.
Data Source
AI summary
Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a vertically-stacked memory module, but is not limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners. Implementations can also be used with other encoding techniques not comprising DBI.