Spare TWI Channels Carry DBI Bits in Stacked Memory

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Solution Overview

Problem

Implementing Data Bus Inversion (DBI) in a memory system using Through-Wafer Interconnects (TWIs) poses challenges due to the complexity and space requirements of adding additional TWI-based channels for DBI signals, which complicates the design and manufacture of vertically stacked memory modules.

Innovation Solution

The solution involves utilizing spare channels in the TWI-based bus to carry DBI bits, allowing DBI to be applied across the bus without adding extra TWI channels by assessing the status of spare channels and rerouting data signals or DBI bits as needed, enabling DBI algorithms to be applied to portions of the bus independently to reduce power consumption and improve data transfer reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional TWI-based channels are added to carry DBI signals, then DBI functionality is achieved, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidbus complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies multi-functionality by enabling spare TWI channels to serve dual purposes: primarily for rerouting data signals around faulty channels, and secondarily for carrying DBI bits when not needed for rerouting. This allows the same physical infrastructure to support both error tolerance and power optimization functions without requiring separate dedicated channels for each purpose.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements self-service by using its own spare capacity (unused TWI channels) to carry DBI signaling information. Rather than requiring external or additional resources, the memory system leverages its built-in redundancy resources to enable DBI functionality, thereby avoiding increased device complexity while achieving power optimization.

Inventive Principle:
Principle #25Self-service

2Reliability

If additional TWI-based channels are added to carry DBI signals, then DBI functionality is achieved, but manufacturing complexity and space requirements increase

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies multi-functionality by enabling spare TWI channels to serve dual purposes: primarily for rerouting data signals around faulty channels, and secondarily for carrying DBI bits when not needed for rerouting. This allows the same physical infrastructure to support both error tolerance and power optimization functions without requiring separate dedicated channels for each purpose.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If DBI is applied to the entire bus, then power consumption is reduced, but flexibility in handling faulty channels is lost

Engineering Contradiction:
Improvepower consumptionVSAvoidrerouting flexibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent applies segmentation by dividing the bus into multiple segments or groups, where DBI can be applied independently to different segments. This allows selective application of DBI encoding to portions of the bus where it is beneficial for power reduction, while leaving other segments available for flexible rerouting operations around faulty channels, thus resolving the contradiction between power reduction and rerouting flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements dynamics by making the DBI application configurable and adaptable based on runtime conditions. The ability to selectively apply DBI to different portions of the bus or to different time periods allows the system to dynamically adjust between power optimization mode and rerouting flexibility mode, depending on whether faulty channels are detected and whether power reduction is the primary objective.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11829267B2Data encoding using spare channels in a memory system
Publication Date: 2023.11.28 LODESTAR LICENSING GROUP LLC
  • US11829267B2 patent drawing
  • US11829267B2 patent drawing
  • US11829267B2 patent drawing

AI summary

Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a vertically-stacked memory module, but is not limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners. Implementations can also be used with other encoding techniques not comprising DBI.