Sparse Buffer Management for Disaggregated Memory Access
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Solution Overview
Problem
Disaggregated memory systems face performance degradation due to longer access times and lower bandwidth of remote memory, leading to inefficient network resource consumption and delay times during sparse access patterns.
Innovation Solution
Implementing a sparse buffer management system that identifies sparse write operations, stores data in a sparse buffer, and manages memory access to reduce remote memory access by fetching and mapping data efficiently, utilizing local memory for frequently accessed data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If remote memory access is performed in a disaggregated memory system, then memory capacity is increased, but access time and network resource consumption increase
Solution Approach 1:
The patent segments memory access into different types (read access and write access) and handles them differently. For write accesses, it introduces sparse buffer management to track modified pages and only fetch them when needed, rather than fetching all pages on every access. This segmentation of access handling reduces unnecessary network traffic and processing overhead.
Solution Approach 2:
The patent implements preliminary actions by maintaining a sparse buffer that pre-stores information about modified pages before they are actually accessed. The buffer table records which pages have been modified and their corresponding sparse buffers, so when a read access occurs, the system already has the necessary metadata ready to efficiently determine what needs to be fetched from remote memory.
2Quantity of substance
If remote memory access is performed in a disaggregated memory system, then memory capacity is increased, but network resource consumption increases
Solution Approach 1:
The patent extracts the essential information needed for memory management from the full page data. Instead of transferring entire pages over the network, it extracts and stores only the critical metadata (page addresses, modification status) in the sparse buffer and buffer table. This extraction significantly reduces the amount of data transmitted over the network while maintaining the functionality of memory management.
Solution Approach 2:
The sparse buffer acts as an intermediary between the local memory and remote memory. It mediates the communication by storing modified page information locally, so that when read accesses occur, the system can determine what needs to be fetched from remote memory without transferring unnecessary data. The buffer table serves as another intermediary structure that maps buffer addresses to physical addresses, further optimizing the data flow.
3Ease of operation
If page-level memory management is used, then memory access is simplified, but fine-grained control and sparse access efficiency are reduced
Solution Approach 1:
The patent segments the page-level memory management into two layers: the buffer table for tracking modified pages and the sparse buffer for storing actual page data. This segmentation allows the system to maintain simple page-level abstraction for most operations while introducing fine-grained control only when necessary for sparse accesses, combining ease of operation with improved efficiency.
Solution Approach 2:
The sparse buffer serves as an intermediary structure that bridges the simplicity of page-level management with the efficiency of fine-grained control. It mediates between the buffer table's coarse tracking and the actual page data, allowing the system to maintain simple interfaces for most operations while providing detailed control for sparse access patterns through the buffer's address offset storage mechanism.
Data Source
AI summary
A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.


