Sparse Convolution Fetch Control in Neural Network Processors

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Solution Overview

Problem

Existing neural network systems face challenges in efficiently processing complex input data in real time, necessitating improved apparatuses and methods for neural network operations.

Innovation Solution

A neural network processor with a fetch controller and data arithmetic circuit that selectively convolute input features and weights based on non-zero values, and a controller that groups weight maps and neural network processors to optimize operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If all input features and weights are convoluted in neural network processing, then complete data processing is achieved, but operation time and computational load increase significantly

Engineering Contradiction:
Improvedata processing completenessVSAvoidoperation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts and identifies only the non-zero input features and weights from the complete data sets, separating meaningful data from zero-value data. The fetch controller detects non-zero values and extracts only those specific features and weights for convolution, eliminating unnecessary zero-value computations while preserving complete processing of meaningful data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by performing convolution operations only on the subset of non-zero input features and weights rather than processing all features and weights completely. This selective partial processing maintains data processing completeness for meaningful values while reducing overall operation time by omitting redundant zero-value operations.

Inventive Principle:
Principle #16Partial or excessive action

2Loss of time

If selective convolution of non-zero features and weights is implemented, then operation time is reduced, but processing complexity increases due to detection requirements

Engineering Contradiction:
Improveoperation timeVSAvoidprocessing complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by having the fetch controller detect and identify non-zero input features and weights before the convolution operation begins. This pre-detection phase prepares the data by marking or separating non-zero values, so that the subsequent convolution process only needs to process the already-identified meaningful data without needing to evaluate zero-values, thereby reducing operation time while managing complexity through staged processing.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If zero-value computations are omitted in convolution, then computational efficiency improves, but data processing completeness may be compromised

Engineering Contradiction:
Improvecomputational efficiencyVSAvoiddata processing completeness
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent extracts only the non-zero input features and weights for convolution operations, separating meaningful computational data from zero-value data. This extraction ensures that zero-value computations are omitted to improve computational efficiency while the complete set of non-zero features and weights is still processed to maintain data processing completeness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter selection criteria for convolution from processing all features and weights to processing only those with non-zero values. This parameter change in the convolution operation - selecting based on non-zero value status rather than complete inclusion - improves computational efficiency by eliminating redundant zero-value operations while maintaining completeness of meaningful data processing.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12626088B2Neural network apparatus, neural network processor, and method of operating neural network processor
Publication Date: 2026.05.12 SAMSUNG ELECTRONICS CO LTD
  • US12626088B2 patent drawing
  • US12626088B2 patent drawing
  • US12626088B2 patent drawing

AI summary

A neural network processor and method include a fetch controller configured to receive input feature information, indicating whether each of a plurality of input features of an input feature map includes a non-zero value, and weight information, indicating whether each of a plurality of weights of a weight map includes a non-zero value, and configured to determine input features and weights to be convoluted, from among the plurality of input features and the plurality of weights, based on the input feature information and the weight information. The neural network processor and method also include a data arithmetic circuit configured to convolute the determined weights and input features to generate an output feature map.