Sparse Data Structure Insertion Using Center Memory Allocation
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Solution Overview
Problem
Conventional data entry methods in memory resources and caches require repeated shifts, writes, and rewrites to maintain data entries in an ordered manner, leading to increased computing resource overhead and reduced performance.
Innovation Solution
A center allocation data structure is used where data entries are written to address locations that are substantially equidistant from the first and last physical addresses of the memory resource, reducing the need for costly shift operations by maintaining order through relative value-based placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If data entries are written sequentially to maintain ordered manner, then data order is maintained, but shift operations and computing resource overhead increase
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the relationship between data values and their corresponding address offsets in a separate data structure. Before writing data entries, the system prepares the address mapping information, allowing data to be written directly to calculated positions without requiring shift operations during the writing process. This resolves the contradiction by maintaining data order through pre-computed addresses while avoiding the overhead of real-time shift operations.
2Ease of operation
If conventional data entry methods are used, then data can be written to memory, but repeated shifts and rewrites are required increasing latency
Solution Approach 1:
The patent introduces an intermediary data structure that stores the mapping between data values and their physical address offsets in memory. This intermediary layer acts as a mediator between the data to be written and the physical memory locations. Instead of directly manipulating data positions through shift operations, the system uses this intermediary structure to calculate and determine the correct write positions, thereby maintaining ease of operation while significantly reducing the latency caused by repeated shifts and rewrites.
3Reliability
If data entries are maintained in ordered manner through conventional methods, then data integrity is preserved, but power consumption increases
Solution Approach 1:
The patent replaces the mechanical shift operation system with a computational addressing system. Instead of physically shifting data bits through multiple write operations to maintain order, the system uses arithmetic calculations based on stored value-offset relationships to determine target addresses. This substitution eliminates the energy-intensive repeated write operations while preserving data integrity through the mathematical relationship between data values and their positions, thereby reducing power consumption while maintaining reliability.
Data Source
AI summary
A plurality of data entries are written in a first memory bank that comprises a portion of a data structure that is stored across a plurality of memory banks. For a subsequent data entry, a determination is made that the subsequent data entry has a value that is greater than a first data entry among the plurality of data entries in the first memory bank and less than a second data entry among the plurality of data entries in the first memory bank. The subsequent data entry is written to an address location in a second memory bank of the plurality of memory banks that is between a lowermost address location and an uppermost address location of the second memory bank and a first bit corresponding to the address location in the second memory bank to which the subsequent data entry was written is stored in the data structure.