Sparse Matrix Subblock Multiplication for Faster Computing

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Solution Overview

Problem

Current matrix multiplication algorithms for sparse matrices are inefficient due to high complexity and low processing speed, especially when dealing with large-scale, non-uniform sparse matrices commonly used in modern applications like artificial intelligence and computational fluid dynamics.

Innovation Solution

A matrix computing method and apparatus that performs block division on sparse matrices at a granularity of subblocks, determining target subblock combinations, and using these combinations to accelerate the multiplication operation, thereby improving computing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a traditional matrix multiplication algorithm is used for sparse matrices, then the computation can be completed, but the processing efficiency is low and the complexity is high

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidalgorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the sparse matrix multiplication problem into multiple processing stages: (1) segmenting the sparse matrix into non-zero element blocks and zero element blocks, (2) segmenting the computation into identification phase and multiplication phase, and (3) segmenting data storage into coordinate format and value format. This segmentation allows the system to process only relevant non-zero elements while skipping zero elements, thereby improving processing efficiency without requiring complex hardware modifications.

Inventive Principle:
Principle #1Segmentation

2Speed

If software-based matrix multiplication is used for sparse matrices, then the implementation is simple, but the computing speed is slow and cannot meet real-time processing requirements

Engineering Contradiction:
Improvecomputing speedVSAvoidhardware structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary data structure called 'sparse matrix descriptor' that acts as a mediator between the sparse matrix data and the processing units. This descriptor contains organized information about non-zero element positions and values, allowing processing units to quickly identify and access only the necessary data for multiplication. This intermediary structure enables faster processing by eliminating the need for complex hardware that would otherwise be required to handle sparse matrix irregularity directly.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If block division is performed at fine granularity, then the parallelism is increased, but the overhead of managing subblocks increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidsubblock management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent resolves the subblock management complexity by transitioning from two-dimensional block management to a one-dimensional linear array representation. Each subblock is assigned a unique linear index, and the relationships between subblocks are managed through index arithmetic rather than spatial coordinates. This dimensional transformation simplifies the management overhead while preserving parallel processing capabilities, as the linear indexing system allows for efficient mapping and aggregation of results from multiple parallel operations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250173398A1Matrix computing method and apparatus
Publication Date: 2025.05.29 HUAWEI TECH CO LTD
  • US20250173398A1 patent drawing
  • US20250173398A1 patent drawing
  • US20250173398A1 patent drawing

AI summary

In the matrix computing method, block division is performed by row on input data of a to-be-multiplied first matrix at a granularity of a subblock whose scale is M×N, to obtain at least one first subblock; and block division is performed by column on input data of a to-be-multiplied second matrix at a granularity of a subblock whose scale is N×R, to obtain at least one second subblock. One or more target subblock combinations are determined, where each target subblock combination includes one first subblock and one second subblock, and at least one element in the first subblock and at least one element in the second subblock in each target subblock combination are to-be-multiplied elements. Each of the one or more target subblock combinations is used as input data of a matrix computing apparatus, to obtain a product result of the first matrix and the second matrix.