Sparse Matrix Vector Multiplication Memory Allocation

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Solution Overview

Problem

Existing methods for parallel matrix operations, such as those involving sparse matrices, face challenges with memory allocation and access conflicts when using multiple threads, leading to inefficiencies and increased memory requirements.

Innovation Solution

A memory allocation program that assigns submatrices to threads based on the distribution of non-zero elements, determining storage area allocation to avoid access conflicts and reduce memory usage by comparing the distribution of non-zero elements in submatrices and allocating shared or individual storage areas accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a storage area having the same size as a column vector that is the final result is allocated to each thread, then parallel processing can be performed, but memory usage increases significantly

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidmemory usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

Multiple threads share a common storage area (work area) instead of each thread having its own separate storage area. The patent implements a work area that is shared by multiple threads, where threads cooperatively update the same storage space, thereby reducing total memory consumption while maintaining parallel processing capability.

Inventive Principle:
Principle #5Merging (Combining)

2Quantity of substance

If one shared storage area is prepared for multiple threads, then memory usage is reduced, but access conflicts occur between threads

Engineering Contradiction:
Improvememory usageVSAvoidaccess conflict
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The shared work area is logically segmented into multiple work vectors, with each thread assigned to update specific work vectors. This segmentation allows threads to operate on different portions of the shared storage area simultaneously without conflicts, while still utilizing shared memory efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system pre-determines the allocation of work vectors to threads based on the distribution of non-zero elements in the matrix. By analyzing the matrix structure beforehand and assigning work vectors accordingly, the system prevents access conflicts before they occur, allowing threads to operate independently on their assigned vectors.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If exclusive control is exercised between threads to avoid access conflicts, then reliability is maintained, but processing speed decreases

Engineering Contradiction:
Improveaccess conflict avoidanceVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary analysis of the matrix structure to identify the distribution of non-zero elements, and based on this analysis, pre-assigns specific work vectors to specific threads. This preliminary action ensures that threads will not access the same work vector simultaneously, eliminating the need for runtime exclusive control mechanisms and maintaining high processing speed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9418048B2Apparatus and method for allocating shared storage areas to parallel processors for multiplication of sparse matrix and vector
Publication Date: 2016.08.16 FUJITSU LTD
  • US9418048B2 patent drawing
  • US9418048B2 patent drawing
  • US9418048B2 patent drawing

AI summary

An information processing apparatus assigns the calculation of a first submatrix included in a matrix including zero elements and non-zero elements to a first thread and the calculation of a second submatrix included in the matrix to a second thread. The information processing apparatus compares the distribution of non-zero elements in the rows or columns of the first submatrix with the distribution of non-zero elements in the rows or columns of the second submatrix. The information processing apparatus determines allocation of storage areas for storing vectors to be respectively used in the calculations by the first and second threads, according to the result of the comparison.