Sparse Pier Support in 3D Memory Arrays for Tolerance Stability
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Solution Overview
Problem
In semiconductor manufacturing, features formed from alternating layers of dielectric material in memory arrays often lack sufficient mechanical support, leading to mechanical instability and poor tolerances during processing.
Innovation Solution
The implementation of pier structures formed in contact with features from alternating layers of materials deposited over a substrate, providing mechanical support when either material is removed to form voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pier structures are added to provide mechanical support, then stability and tolerances are improved, but device complexity increases
Solution Approach 1:
Pier structures are formed in advance during the manufacturing process, before the alternating layer materials are deposited and before void formation occurs. These piers are pre-positioned to provide mechanical support throughout subsequent processing steps, preventing instability and ensuring tolerances are maintained without requiring additional corrective measures later.
Solution Approach 2:
The pier structures act as intermediary support elements between the alternating layer materials. They are formed from a material that provides mechanical strength while allowing the other materials to be selectively removed. The piers mediate the structural requirements by supporting the cross-sectional patterns during processing and then being removed after serving their support function.
2Reliability
If pier structures are formed through the stack of layers, then mechanical support is provided, but manufacturing complexity increases
Solution Approach 1:
The pier structures are formed at an early stage in the manufacturing process, before the alternating layer materials are deposited. This preliminary formation allows the piers to serve as templates or support structures throughout the subsequent deposition and processing steps, ensuring stability without requiring complex modifications to later manufacturing stages.
Solution Approach 2:
The manufacturing process is segmented into distinct stages: first forming the pier structures, then depositing alternating layers, then forming voids, and finally removing the piers. This segmentation allows each step to be optimized independently, with the pier formation being a separate, manageable process that provides reliability without overwhelming the overall manufacturing complexity.
3Ease of manufacture
If sparse pier arrangement is used, then manufacturing complexity is reduced, but mechanical support coverage is decreased
Solution Approach 1:
Instead of uniformly distributing pier structures throughout the entire array, the invention uses sparse piers arranged at specific strategic locations. Each pier is positioned to provide localized support to critical cross-sectional patterns, ensuring that mechanical support is concentrated where most needed rather than distributed evenly, thereby reducing overall complexity while maintaining reliability.
Data Source
AI summary
Methods, systems, and devices for sparse piers for three-dimensional memory arrays are described. A semiconductor device, such as a memory die, may include pier structures formed in contact with features formed from alternating layers of materials deposited over a substrate, which may provide mechanical support for subsequent processing. For example, a memory die may include alternating layers of a first material and a second material, which may be formed into various cross-sectional patterns. In some examples, the alternating layers may be formed into one or more pairs of interleaved comb structures. Pier structures may be formed in contact with the cross sectional patterns to provide mechanical support between instances of the cross-sectional patterns, or between layers of the cross-sectional patterns (e.g., when one or more layers are removed from the cross-sectional patterns), or both.