Spatially Indexed Two-Line Data Bus for Multi-IC Addressing
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Solution Overview
Problem
Existing two-line data bus protocols face challenges such as address conflicts and the need for additional lines like the 'chip select' line, which limits the ability to connect multiple identical electronic components with permanent device addresses to the same bus.
Innovation Solution
A spatially indexed two-line data bus that uses a spatial grid to dynamically select indexed connection points for media access, allowing electronic components with conflicting addresses or no protocol addressing to be connected by mapping physical location to electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional two-line protocols use address prefixing to route data, then data can be routed to correct ICs, but address conflicts occur when multiple ICs have the same address
Solution Approach 1:
The patent introduces a spatial dimension to address routing by mapping IC physical locations to a 2D grid coordinate system. Instead of using address prefixes, the system determines which IC to communicate with by calculating which grid intersection point corresponds to the target IC's location, enabling multiple ICs with identical protocol addresses to be distinguished by their spatial positions.
Solution Approach 2:
The patent introduces a spatial index as an intermediary layer between the two-line bus and the ICs. This spatial index maps grid coordinates to IC locations, acting as a mediator that translates bus commands into specific IC selections without requiring address prefixes on the bus itself, thereby resolving address conflicts.
2Stability of the object's composition
If permanent device addresses are set at factory, then IC identity is fixed, but it becomes impossible to connect more than one identical IC to the same two-line bus
Solution Approach 1:
The patent adds a spatial dimension to IC identification by assigning each IC a unique grid coordinate based on its physical location. This allows ICs with identical factory-set addresses to be distinguished by their positions in the 2D grid, enabling multiple identical ICs to connect to the same two-line bus without address conflicts.
Solution Approach 2:
The patent makes the addressing scheme location-dependent rather than IC-dependent. Each IC's address is determined by its local position in the grid, so identical ICs at different locations have different effective addresses. This local quality approach allows identical ICs to coexist on the same bus by differentiating them through their spatial characteristics.
3Adaptability or versatility
If additional chip select lines are used to prevent conflicts, then multiple ICs can be connected, but the two-line protocol requirement is violated
Solution Approach 1:
The patent replaces the need for additional chip select lines by introducing a spatial dimension to the existing two-line protocol. Instead of adding more lines to select different ICs, the system uses the 2D grid spatial index to encode IC selection information in the existing data lines, maintaining the two-line constraint while enabling multi-IC connectivity.
Solution Approach 2:
The patent makes the existing two-line bus multi-functional by enabling it to both address and select ICs simultaneously through spatial indexing. The same data lines that carry protocol data also encode spatial location information, eliminating the need for separate chip select lines and maintaining protocol simplicity while achieving multi-IC support.
Data Source
AI summary
The invention addresses individual electronic components on a shared communication bus by using spatial indexing to route data based on the physical location of the electronic components. The spatially indexed two-line data bus maps a spatial grid to a plurality of indexed connection points, which are geometrically arranged in physical space, to a set of electrically conductive grid lines. The grid lines form a communication network which can be connected to electronic components physically located on the mapped spatial grid. In the preferred embodiment, the grid lines are comprised of copper traces on a printed circuit board (PCB). In another embodiment, the grid lines are comprised of connecting wires. The electronic components are connected electrically in parallel with the grid lines.