Spatially Segregated eFPGA Logic for Deterministic Multi-Core Control

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Solution Overview

Problem

In hard real-time and safety-sensitive applications like automotive powertrain control, existing FPGA architectures face challenges in ensuring exclusive resource allocation, non-regression of certified firmware, and flexibility, particularly with multi-core processing and partial reconfiguration, which impact performance and productivity.

Innovation Solution

The introduction of a heterogeneous electronic system with SBOX circuits and flexible logic units that allow for spatial segregation, enabling the merging of contiguous eFPGA matrices as a single unit from a tooling perspective, while maintaining flexibility and resource usage without design-time overhead, and allowing for runtime connection or isolation of FLU arrangements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple smaller FPGA matrices are used to enable strict independence of applications, then resource allocation exclusivity is improved, but flexibility to execute complex applications is worsened

Engineering Contradiction:
Improveapplication independenceVSAvoidcomplex application execution
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system divides the FPGA matrix into multiple smaller, independently controllable segments or partitions. Each segment can be independently configured and allocated to different applications, ensuring strict independence and exclusivity. This segmentation allows multiple applications to run in isolation while maintaining the ability to allocate resources dynamically based on application complexity requirements.

Inventive Principle:
Principle #1Segmentation

2Reliability

If applications are split across multiple FLU parts, then resource allocation is improved, but application performance is worsened due to interconnect bottlenecks

Engineering Contradiction:
Improveresource allocationVSAvoidapplication performance
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system provides mechanisms to merge or connect multiple FLU parts together when executing a single complex application. By allowing dynamic merging of previously segmented resources, the system eliminates interconnect bottlenecks and enables high-performance execution of complex applications that require access to the full resource pool without performance degradation from communication overhead.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If manual splitting of applications is done at design time, then resource allocation is improved, but productivity is worsened

Engineering Contradiction:
Improveresource allocationVSAvoidapplication development efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system implements dynamic resource allocation and application mapping that can be adjusted at runtime rather than being fixed at design time. This dynamic capability allows the system to automatically optimize resource allocation based on current application requirements, eliminating the need for manual design-time splitting while maintaining efficient resource utilization and improving overall development productivity.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If partial reconfiguration is used, then flexibility is improved, but demonstration of application independence becomes difficult

Engineering Contradiction:
Improvefirmware updatingVSAvoidapplication independence verification
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system segments the FPGA into independently configurable partitions with well-defined boundaries and interfaces. Each partition can be independently reconfigured while maintaining clear separation from other partitions. This segmented architecture enables partial reconfiguration for flexibility while simultaneously making it straightforward to verify application independence through formal boundary definitions and isolated configuration spaces.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11764787B2Spatial segregation of flexible logic hardware
Publication Date: 2023.09.19 SILICON MOBILITY SAS
  • US11764787B2 patent drawing
  • US11764787B2 patent drawing
  • US11764787B2 patent drawing

AI summary

The invention relates to an electronic system, comprising components and/or units of various kinds, hence the electronic system can be called a heterogeneous system. The invented electronic system can be applied in the electric system digital control domain and in particular it is targeting (but not limited to) control of power train of pure electric or hybrid vehicle electric motors that require hard real time and safe control.