Spatially Segregated eFPGA Logic for Safe Real-Time Motor Control
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Solution Overview
Problem
In hard real-time and safety-sensitive applications like automotive powertrain controllers, existing systems face challenges in ensuring exclusive resource allocation for re-configurable logic units (FLU) and maintaining non-regression of certified firmware, particularly in multi-core processing environments where applications are merged into a single bitstream, leading to inflexibility and communication bottlenecks.
Innovation Solution
The introduction of spatial segregation using SBOX circuits and special control structures allows for the separation and merging of eFPGA matrices as a single unit from the FPGA tooling perspective, enabling flexible configuration and isolation of FLU partitions at runtime, with a master FLU controller for synchronization and separate clock and reset control, optimizing resource usage and reducing design time overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple FLU partitions are physically separated to ensure exclusive resource allocation and independent bitstream execution, then functional safety and real-time constraints are improved, but device flexibility and resource utilization deteriorate due to communication bottlenecks and data-flow limitations through SOC interconnect
Solution Approach 1:
The system is divided into multiple physically separated FLU partitions, each capable of independent configuration and execution with exclusive resource allocation. This segmentation enables functional safety by isolating critical functions while maintaining overall system flexibility through standardized interconnection interfaces.
Solution Approach 2:
Each FLU partition is designed with universal interfaces and standardized communication protocols, allowing the same hardware block to serve multiple functions depending on configuration. The SOC interconnect provides multi-functional connectivity that enables flexible data flow between partitions without requiring dedicated point-to-point connections.
2Adaptability or versatility
If a single large eFPGA matrix is used to execute complex applications, then adaptability and resource utilization are improved, but demonstrating application independence and ensuring non-regression of certified firmware deteriorates due to merged bitstream execution
Solution Approach 1:
The large eFPGA matrix is segmented into multiple smaller FLU partitions, each capable of loading and executing independent bitstreams. This allows complex applications to be distributed across partitions while maintaining the ability to independently verify and certify each partition's firmware without affecting others.
Solution Approach 2:
The SOC interconnect acts as an intermediary between FLU partitions, enabling communication and data exchange while maintaining logical isolation. This mediator allows independent bitstream execution in each partition while still supporting complex applications that require inter-partition collaboration.
3Adaptability or versatility
If FLU partitions are manually split and interconnect communication bridges are inserted to enable complex application execution, then adaptability is improved, but device complexity and design time overhead increase significantly
Solution Approach 1:
The FLU partitions are equipped with self-configuration capabilities through standardized interfaces and automated tooling support. The system automatically manages interconnect routing and communication bridges, eliminating the need for manual design intervention while maintaining high adaptability for complex applications.
Solution Approach 2:
The system uses configurable parameters and programmable interfaces to dynamically adjust interconnect behavior and communication patterns. This allows the same hardware architecture to adapt to different application requirements without requiring physical redesign or manual insertion of communication bridges.
Data Source
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AI summary
The invention relates to an electronic system, comprising components and/or units of various kinds, hence the electronic system can be called a heterogeneous system. The invented electronic system can be applied in the electric system digital control domain and in particular it is targeting (but not limited to) control of power train of pure electric or hybrid vehicle electric motors that require hard real time and safe control.