Spatial FEC Transceiver Redundancy for Failure-Tolerant Links

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Solution Overview

Problem

Conventional digital communication systems face bit errors due to noise and bandwidth limitations, with Forward Error Correction (FEC) codes being insufficient to handle complete transceiver failures, leading to uncorrected errors and reduced data transmission reliability.

Innovation Solution

Implementing spatial FEC by interleaving FEC check bits across multiple transceivers to correct errors and incorporating spare transceivers to handle failures, combined with temporal FEC for additional error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If stronger FEC codes are used to detect and correct bit errors, then error correction capability is improved, but transmission overhead increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtransmission overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the FEC protection mechanism into two distinct layers: spatial FEC that distributes check bits across multiple transceivers, and temporal FEC that provides traditional time-domain error correction. This segmentation allows each layer to operate with optimized overhead, where spatial FEC handles transceiver failures efficiently without requiring excessive redundancy in any single transmission stream.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a spatial dimension to FEC by distributing check bits across multiple transceivers simultaneously, rather than only in the time domain. This dimensional expansion enables the system to correct errors caused by complete transceiver failures while maintaining efficient overhead through parallel distribution across N transceivers, each carrying a portion of the check bits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional FEC codes are used, then some bit errors can be corrected, but complete transceiver failures cannot be handled

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidhandling capability for transceiver failures
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the error correction function into spatial FEC for handling transceiver failures and temporal FEC for handling bit errors, allowing each mechanism to specialize in its optimal error type without requiring a single overly complex code to handle all failure modes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By adding the spatial dimension of distributing check bits across multiple transceivers, the system gains the capability to handle complete transceiver failures, which cannot be addressed by conventional time-domain FEC alone. This dimensional change expands the system's adaptability to different failure scenarios.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If more FEC check bits are added to handle all error cases, then error correction capability is improved, but transmission efficiency decreases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the check bit function across N transceivers in parallel, so that each transceiver carries only a portion of the total check bits. This segmentation reduces the overhead burden on any single transmission stream while maintaining comprehensive error correction capability through the collective contribution of all transceivers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent moves the check bit distribution from a single-time-domain stream to a multi-spatial-transceiver dimension, enabling parallel transmission of check bits across N transceivers. This dimensional transformation allows the system to maintain high transmission efficiency by distributing the overhead burden across multiple channels simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260074824A1Error correction code protected transceiver systems and methods
Publication Date: 2026.03.12 ERIDU CORP
  • US20260074824A1 patent drawing
  • US20260074824A1 patent drawing
  • US20260074824A1 patent drawing

AI summary

Consistent with an aspect of the present disclosure, an exemplary digital communication system is provided that includes redundant or spare transceivers to handle failure events. In one example, if one of the first N+r transceivers experience a failure, spatial FEC codewords can correct the resulting bit errors and, as previously mentioned, prevent post-FEC errors from occurring. In embodiments, if a primary transceiver fails, a redundant transceiver may be activated to take its place.