Spatial Architecture Memory Bandwidth Optimization via Loop Schedule Transformation
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Solution Overview
Problem
Scheduling operations for parallel execution across multiple processors is complex, especially when dealing with non-scalar data structures and loop nests, as it requires balancing parallelization, memory locality, and data communication, often leading to excessive data communication and increased memory access bandwidth.
Innovation Solution
The method involves detecting broadcast patterns of data elements within loop nests and transforming loop schedules to minimize data communication by reorganizing access patterns to reduce remote memory access and promote neighbor-to-neighbor data transfer, using the polyhedral model to preserve parallelism and locality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scheduling operations for parallel execution across multiple processors is performed without optimization, then parallelization efficiency is improved, but data communication between shared memory and processors increases
Solution Approach 1:
The patent segments the data access pattern by identifying broadcast operations and separating them from regular access patterns. By detecting when multiple processors access the same memory location simultaneously, the system can apply specialized optimization techniques only to those specific access patterns rather than all memory operations, thus reducing overall communication overhead while maintaining parallelization efficiency.
Solution Approach 2:
The patent performs preliminary analysis during the scheduling phase to detect broadcast patterns before execution occurs. By identifying potential broadcast operations in advance, the compiler can transform the code to eliminate redundant memory accesses, thereby reducing data communication requirements before the parallel execution begins.
2Loss of energy
If broadcast patterns are eliminated through loop schedule transformation, then data communication is reduced, but computation time may increase due to additional transformation overhead
Solution Approach 1:
The patent changes the parameters of the loop schedule by applying transformations that modify iteration ordering and processor mapping. These parameter changes are specifically targeted at broadcast operations, where the loop schedule is transformed to eliminate simultaneous access to the same memory location, thereby reducing memory bandwidth requirements without significantly impacting overall computation time.
3Loss of energy
If loop schedules are transformed to minimize data communication, then memory bandwidth is optimized, but scheduling complexity increases
Solution Approach 1:
The patent applies local quality by focusing optimization efforts specifically on broadcast operations rather than uniformly optimizing all memory access patterns. The system detects and identifies broadcast patterns, then applies loop schedule transformations only to those specific cases, leaving other memory access patterns unchanged. This localized approach reduces scheduling complexity compared to a comprehensive optimization approach.
Data Source
AI summary
A technique to facilitate efficient, parallelized execution of a program using a multiprocessor system having two or more processors includes detecting and, optionally, minimizing broadcast data communication between a shared memory and two or more processors. To this end, the broadcast space of a data structure is generated as an intersection of the reuse space of the data structure and the placement space of a statement accessing the data structure. A non-empty broadcast space implies broadcast data communication that can be minimized by rescheduling the statement accessing the data structure.