3-Chip Image Sensor Spatial Shift Circuit for Resolution and Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-definition image processing devices face challenges such as increased power consumption, heat generation, and difficulty in downsizing due to larger circuit scales required for processing high-definition images.
Innovation Solution
The implementation of spatial pixel shifts and corresponding signal processing in a 3-chip camera system, where image sensors for red, green, and blue colors are arranged with spatial deviations, allowing for increased pixel density and reduced aliasing noise, thereby enhancing image resolution without increasing circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional image processing circuits are scaled up to process high-definition images, then image processing capability is improved, but power consumption increases and device size increases
Solution Approach 1:
The image processing circuit is divided into multiple functional blocks (signal correction processing unit, edge enhancement circuits, adding circuits, color difference signal generating unit, pixel interpolating units) that can process different aspects of image data independently. This segmentation allows for more efficient resource utilization and reduced overall power consumption compared to a monolithic processing circuit.
Solution Approach 2:
The patent introduces spatial pixel shifts in the third dimension (depth/spatial arrangement of image sensors) to achieve higher effective resolution without proportionally increasing the processing circuit scale. By arranging image sensors for different colors (R, G, B) with spatial deviations, the system extracts additional spatial frequency information without requiring a proportional increase in processing power.
2Productivity
If conventional image processing circuits are scaled up to process high-definition images, then image processing capability is improved, but device size increases
Solution Approach 1:
The processing circuit is segmented into specialized functional units that can be efficiently laid out on a chip. The dividing circuit separates output image signals into multiple bands and directs them to appropriate pixel interpolating units, reducing the need for full-signal processing throughout the entire circuit and thereby reducing overall device size.
Solution Approach 2:
By utilizing spatial pixel shifts across multiple image sensor planes (R, G, B sensors with different spatial positions), the system achieves super-resolution imaging without requiring a proportional increase in processing circuit area. The spatial arrangement of sensors provides additional information dimensions that reduce the computational burden on the processing circuit.
3Measurement precision
If spatial pixel shifts are implemented to increase pixel density, then image resolution is improved, but circuit complexity increases
Solution Approach 1:
Different processing pathways are applied to different spatial frequency bands. The dividing circuit separates output signals into multiple bands, and each pixel interpolating unit processes specific bands with appropriate interpolation methods. This local quality approach allows high-resolution processing where needed while simplifying processing elsewhere, managing circuit complexity effectively.
Solution Approach 2:
The patent achieves higher effective pixel density by utilizing the spatial dimension through multiple image sensor planes with deliberate spatial deviations. By arranging R, G, and B image sensors at different spatial positions and applying pixel shift processing, the system extracts sub-pixel information without requiring a proportional increase in processing circuit complexity.
Data Source
AI summary
An image processing device of an embodiment includes: an input circuit to input a first to a third image signal respectively corresponding to different first to third colors of an image; a first generator to generate a fourth image signal by adding the first and second image signals; an enhancing circuit to apply edge enhancement processing to the third and fourth image signals; an output circuit to output the third and fourth image signals having undergone the edge enhancement processing in correspondence to a plurality of different areas of the image; a dividing circuit to divide the output third image signal and the output fourth image signal into a plurality of fifth image signals and a plurality of sixth image signals respectively; and a second generator to generate a luminance signal based on the plural fifth and sixth image signals.