Spatial Temporal Pulse Width Modulation for DMD Image Display
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Solution Overview
Problem
Pulse Width Modulation (PWM) in image display systems faces a tradeoff between brightness, color separation, power consumption, and temporal artifacts, with reduced bit splitting leading to longer battery life but increased visible artifacts, and processor-to-DMD bandwidth limitations further degrading image quality.
Innovation Solution
The method involves loading multiple bit planes simultaneously using spatial multiplexing techniques, such as loading alternating even and odd lines sequentially, and employing a DMD reset scheme that reduces peak bandwidth by half, allowing bit planes to be grouped closer in time without increasing hardware resets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If bit splitting is reduced to decrease PWM power consumption, then battery life is extended, but visible temporal artifacts increase
Solution Approach 1:
The patent transitions from temporal multiplexing (sequential bit-plane loading) to spatial multiplexing (parallel loading of multiple bit-planes into different memory locations). By organizing bit-plane data across spatial dimensions (different memory banks/locations) rather than processing them sequentially in time, the system reduces peak bandwidth requirements while maintaining adequate bit splitting for artifact-free display.
2Device complexity
If processor-to-DMD bandwidth is limited, then hardware complexity is reduced, but image quality degrades due to inability to load bit planes quickly enough
Solution Approach 1:
The patent segments the bit-plane data into multiple parallel streams that can be loaded simultaneously into different memory locations. By dividing the data loading task across multiple spatial channels rather than requiring high-speed sequential transmission, the system reduces peak bandwidth requirements while maintaining the ability to deliver all necessary bit-plane data within the frame period.
Solution Approach 2:
The patent introduces spatial multiplexing by loading multiple bit-planes into different memory locations simultaneously. This transforms the problem from a temporal bandwidth constraint to a spatial memory organization problem, allowing limited bandwidth hardware to achieve the same effective data throughput by utilizing parallel memory access paths.
3Manufacturing precision
If frame rate is increased to improve image quality, then temporal resolution is improved, but power consumption increases
Solution Approach 1:
The patent implements an optimized periodic loading scheme where multiple bit-planes are loaded in parallel during each frame period rather than sequentially. This reduces the total loading time required per frame, allowing the system to maintain higher frame rates with reduced duty cycle for data transmission, thereby lowering average power consumption while preserving temporal resolution.
Data Source
AI summary
A method of controlling micromirrors of reset groups of a spatial light modulator (SLM) digital micromirror array is disclosed. In a first reset operation, the positions of a first subgroup of micromirrors of a reset group are set based on a first portion of a first bitplane and the positions of a second subgroup of micromirrors of the same reset group are set based on a first portion of a second bitplane. Then, in a second reset operation, the positions of the first subgroup are set based on a second portion of the second bitplane and the positions of the second subgroup are set based on a second portion of a first bitplane. In one example, subsets of alternating rows of micromirrors of the same reset group are successively set according to alternating data corresponding to different ones of first and second bitplanes.