Spatio-Temporal Tunable Pixels ROIC for Multi-Spectral Imaging
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Solution Overview
Problem
Current readout-integrated circuits (ROICs) for infrared detectors lack the ability to independently control voltage bias and polarity on each pixel, limiting advanced processing and multicolor image capabilities, and require multiple spectral bands and connections, which increases complexity and cost.
Innovation Solution
A ROIC design that includes a memory for each pixel, an address selector for synchronizing bias voltage, a reference voltage recover switch for integrator voltage calculation, and a pulse-width control circuit to prevent crosstalk, allowing for independent bias voltage control and non-uniformity correction across pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional ROIC with global pixel biasing is used, then device complexity is reduced, but pixel-level processing capability and spectral adaptability are limited
Solution Approach 1:
The patent divides the global bias control into individual pixel-level bias controls. Each pixel is equipped with its own bias control circuitry including memory elements and switching mechanisms, allowing independent voltage application to each pixel. This segmentation enables advanced pixel-level processing and spectral adaptability while managing complexity through modular design.
Solution Approach 2:
The patent introduces temporal dimension to bias control by implementing spatio-temporal tunable pixels. The bias voltage can be dynamically adjusted over time for each pixel, enabling spectral adaptation and multicolor imaging capabilities. This adds the time dimension to the traditional spatial bias control, transforming static global biasing into dynamic pixel-specific biasing.
2Adaptability or versatility
If dual stacked sensors with two contacts are used, then two-color or dual-band capability is achieved, but device complexity and connection requirements increase
Solution Approach 1:
The patent implements a single focal plane array that can operate in multiple spectral bands by dynamically adjusting pixel bias voltages. The same physical sensor structure serves multiple functions (visible light detection, infrared detection, multicolor imaging) through electronic control of pixel characteristics, eliminating the need for separate stacked sensors and reducing connection complexity.
Solution Approach 2:
The patent employs dynamic bias voltage adjustment to change pixel spectral response characteristics in real-time. By varying the bias voltage applied to each pixel, the sensor can adapt its spectral sensitivity between different bands (visible, infrared, multicolor), transforming a static sensor into a dynamically reconfigurable multi-spectral imager.
3Adaptability or versatility
If individual pixel bias control is implemented, then spectral adaptability and multicolor imaging are enabled, but ROIC complexity increases
Solution Approach 1:
The patent incorporates memory elements (such as capacitors or flip-flops) at each pixel to pre-store bias voltage values. This preliminary action allows the bias voltage to be set in advance for each pixel, enabling rapid spectral switching without requiring complex real-time voltage generation circuits at each pixel location, thus managing complexity while maintaining spectral adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables wide voltage range biasing in both polarities on individual pixels, reduces costs, and provides non-uniformity correction, enabling advanced pixel-level processing and multicolor imaging without the need for multiple spectral bands or connections.
Implementation Method 1
One approach to realize an infrared retina involves the use of spectrally adaptive sensors that are bias tunable by exploiting the quantum confined Stark effect (QCSE) in the quantum dots in a well (DWELL) heterostructure.
Data Source
AI summary
Provided is a readout integrated circuit (ROIC). The ROIC includes a memory for each of a plurality of pixels, an address selector to synchronize a subsequent bias voltage for each of the pixels, a reference voltage recover switch to subtract the initial bias voltage from an output voltage of the integrated circuit and to result an integrator voltage for a sample and hold block, and a pulse-width control circuit to prevent crosstalk of the subsequent bias voltage between first and second ones of the pixels while a pixel clock selects adjacent columns. The memory maintains an initial bias voltage for each pixel during an initial integration frame time and during a sample and hold readout processing time. The sample and hold readout processing time is utilized to write a subsequent bias voltage for each pixel for a subsequent integration frame time to allow the first one of the pixels to have a different bias voltage than the second one of the pixels inside each integration frame time.