SPC Sensor Interface Parity Protection for Error Detection
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Solution Overview
Problem
Current data protection systems for sensor interfaces like SPC and SENT, which use PWM encoding for 4-bit nibbles, face challenges in detecting errors, especially in the Least Significant Bit (LSB), due to high Signal to Noise Ratio (SNR) of the Most Significant Bit (MSB), leading to reduced payload capacity and inefficiencies in error detection and correction.
Innovation Solution
The implementation of a data protection system that generates a nibble indicia based on selected nibbles within a data grouping, using various parity and modulo calculations, to enhance error detection and correction, while optimizing transmission efficiency by appending the nibble indicia at the end of the data grouping rather than immediately after each nibble.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a N-bit CRC is used over all bits of the message to protect the message, then error detection capability is improved, but payload capacity is reduced
Solution Approach 1:
The patent divides the message into 4-bit nibbles and applies different protection strategies to different bit positions within each nibble. The MSB uses timing evaluation for error detection, while the LSBs use parity bits. This segmentation allows selective protection without requiring a comprehensive CRC over all bits, thereby maintaining higher payload capacity while providing adequate error detection for the most vulnerable bits.
Solution Approach 2:
Instead of applying full N-bit CRC protection to all message bits, the patent applies partial protection only to the Least Significant Bits (LSBs) using parity bits, while relying on timing evaluation for the Most Significant Bit (MSB). This partial action approach provides sufficient error detection capability for the bits that need it most, while minimizing the overhead and preserving payload capacity.
2Reliability
If the length of the CRC is enhanced to better protect the message, then error detection capability is improved, but transmission efficiency is reduced
Solution Approach 1:
The patent segments the error detection mechanism into two parts: timing evaluation for MSB detection and parity bit checking for LSB detection. This segmentation allows the system to achieve robust error detection without requiring a long CRC, thereby maintaining high transmission efficiency while improving reliability.
Solution Approach 2:
The patent changes the protection parameter from a uniform N-bit CRC applied to all message bits to a selective approach where only the LSBs receive parity bit protection. This parameter change optimizes the balance between error detection capability and transmission efficiency by applying protection only where most needed.
3Reliability
If parity bits are appended after each nibble for error detection, then error detection capability is improved, but device complexity is increased
Solution Approach 1:
The patent merges the error detection functionality into the existing PWM-based timing evaluation mechanism. The same timing evaluation that detects MSB errors also serves to detect transmission errors in the parity bits themselves. This merging reduces device complexity by avoiding separate error detection circuits while maintaining robust error detection capability.
Solution Approach 2:
The timing evaluation mechanism is given multiple functions: it detects MSB errors by evaluating pulse width, and it also detects parity bit transmission errors. This multi-functionality reduces the need for separate error detection mechanisms, thereby reducing device complexity while improving overall error detection capability.
4Reliability
If timing evaluation is used to detect MSB errors, then error detection capability for MSB is improved, but payload capacity is reduced
Solution Approach 1:
The patent uses the PWM signal itself to carry error detection information for the MSB. The pulse width of the PWM signal encodes the MSB value, and the timing evaluation of this pulse width provides automatic error detection without requiring separate error detection bits. This self-service approach allows error detection without reducing payload capacity.
Data Source
AI summary
A sensor system is configured to communicate at least partially protected sensor data over a communication interface. The sensor system includes a sensor element and a communication interface communicatively coupled to the sensor element. The sensor element is configured to provide sensor data in the digital domain. The communication interface is configured to generate a data package for transmission over the communication interface from the sensor data. The data package includes a data grouping comprising one or more nibbles related to the sensor data. The data package further includes a nibble indicia based on at least a portion of selected nibbles within the data grouping.


