SPDT Switch Topology for High Linearity and Low Return Loss
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing SPDT switches face limitations in linearity due to insufficient bootstrapping and return loss degradation caused by parasitic capacitance associated with on-chip coupling capacitors, particularly in routing radio frequency and millimeter-wave signals.
Innovation Solution
The design incorporates auxiliary transistors connected between the common terminal and the gates of switching transistors, along with coupling capacitors between switched terminals and transistors, to maintain consistent bias voltages and reduce parasitic capacitance, ensuring high linearity without the need for intervening coupling capacitors between switching transistors and the common terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If on-chip coupling capacitors are used in the SPDT switch, then signal routing is enabled, but return loss degradation occurs due to parasitic capacitance
Solution Approach 1:
The patent removes the on-chip coupling capacitors from the signal path between the switching transistors and the common terminal. By extracting these problematic capacitive elements, the design eliminates the source of parasitic capacitance that degrades return loss, while maintaining signal routing functionality through direct transistor connections.
Solution Approach 2:
The patent introduces auxiliary transistors as intermediary elements between the switching transistors and the common terminal. These auxiliary transistors serve as mediators that enable signal routing without requiring capacitive coupling, thereby avoiding the return loss degradation caused by parasitic capacitance while maintaining the necessary signal path connectivity.
2Ease of operation
If conventional bootstrapping is used in the SPDT switch, then switching control is provided, but linearity is lost due to insufficient bootstrapping
Solution Approach 1:
The auxiliary transistors act as intermediary devices that enhance the bootstrapping mechanism. By positioning these auxiliary transistors between the switching transistors and the common terminal, the design provides improved voltage control and signal isolation, enabling better linearity while maintaining switching control functionality.
Solution Approach 2:
The patent modifies the electrical parameters of the switch by introducing auxiliary transistors with specific sizing relationships (channel widths at most equal to, or at most 50% or 35% of, the switching transistor channel widths). This parameter optimization enables superior linearity performance while maintaining effective switching control.
3Manufacturing precision
If auxiliary transistors are added to improve linearity, then device complexity increases
Solution Approach 1:
The auxiliary transistors perform multiple functions simultaneously: they provide enhanced bootstrapping for improved linearity, enable direct coupling to the common terminal without capacitors, and contribute to overall signal routing control. This multi-functionality justifies the additional device complexity by delivering multiple performance benefits from a single structural addition.
Data Source
AI summary
A single-pole double-throw switch. In some embodiments, the switch includes a first switching transistor connected between a common terminal of the single-pole double-throw switch and a first switched terminal of the single-pole double-throw switch, a second switching transistor connected between the common terminal of the single-pole double-throw switch and a second switched terminal of the single-pole double-throw switch, a first auxiliary transistor connected between the common terminal of the single-pole double-throw switch and a gate of the first switching transistor, and a second auxiliary transistor connected between the common terminal of the single-pole double-throw switch and a gate of the second switching transistor.