Speculative Cache Isolation for Spectre and Meltdown Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data processing systems using speculative execution are vulnerable to attacks like Spectre and Meltdown, where attackers exploit cache interactions, and existing countermeasures reduce processor performance.

Innovation Solution

Implementing a separate speculative cache memory that only stores data for speculative instructions, preventing write operations to the normal cache during speculative execution, and transferring data to the normal cache only after the instruction is committed, thus isolating speculative execution traces from the main cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If speculative execution is used to speed up instruction execution, then processor performance is improved, but security vulnerabilities arise allowing attackers to exploit cache interactions to recover secret data

Engineering Contradiction:
Improveinstruction execution speedVSAvoidsecurity vulnerability to Spectre and Meltdown attacks
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The cache memory is divided into two separate segments: a first cache for storing data accessed by non-speculative instructions and a second cache for storing data accessed by speculative instructions. This segmentation isolates speculative execution traces in the second cache, preventing attackers from exploiting interactions with the first cache to recover secret data, while still allowing speculative execution to proceed for performance improvement.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If existing countermeasures are implemented to prevent speculative execution attacks, then security is improved, but processor performance is reduced

Engineering Contradiction:
Improveprotection against speculative execution attacksVSAvoidprocessor performance
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

By segmenting the cache into separate first and second caches, the system provides security against speculative execution attacks without requiring software-based countermeasures that would slow down processing. Speculative instructions can freely access the second cache while non-speculative instructions access the first cache, maintaining performance while preventing attack vectors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second cache acts as an intermediary buffer between speculative instructions and the main first cache. This intermediary structure allows speculative execution to proceed without directly interacting with the first cache that contains sensitive data, providing security without performance penalties.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10657057B2Secure speculative instruction execution in a data processing system
Publication Date: 2020.05.19 NXP BV
  • US10657057B2 patent drawing
  • US10657057B2 patent drawing
  • US10657057B2 patent drawing

AI summary

A data processing system includes a processor, a cache memory, a speculative cache memory, and a control circuit. The processor is for executing instructions. The cache memory is coupled to the processor and is for storing the instructions and related data. A speculative cache is coupled to the processor and is for storing only speculative instructions and related data. The control circuit is coupled to the processor, to the cache memory, and to the speculative cache. The control circuit is for causing speculative instructions to be stored in the speculative cache in response to receiving an indication from the processor. Also, a method is provided for speculative execution in the data processing system.