Speculative Decision Feedback Equalizer With Split Unroll Multiplexers
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Solution Overview
Problem
Existing decision feedback equalizers (DFEs) face challenges in meeting timing requirements at high data rates, such as 32 Gb/s, due to the small unit interval and increased signal corruption from frequency-dependent losses and noise, making it difficult to satisfy the timing requirements for symbol alignment and processing within a single symbol period.
Innovation Solution
The proposed DFE design incorporates a speculative DFE structure with split unroll multiplexers, decoupling the loading of the input stage and the h1 unrolling loop, allowing each multiplexer to be configured to minimize specific delays and meet timing requirements, including a first multiplexer with a selection-to-output delay less than a unit interval and a second multiplexer with a data output delay less than two unit intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single multiplexer is used for both h1 unrolling and h2 tap closing in existing DFE, then device complexity is reduced, but timing requirements cannot be met at high data rates due to increased loading delay
Solution Approach 1:
The patent divides the single multiplexer into two separate multiplexers: a first multiplexer for h1 unrolling and a second multiplexer for h2 tap closing. This segmentation allows each multiplexer to be independently optimized for its specific timing requirements, with the first multiplexer having selection-to-output delay less than unit interval and the second multiplexer having data output delay less than two unit intervals, thereby resolving the timing constraint at high data rates.
2Productivity
If data rate increases to meet higher throughput demands, then productivity improves, but timing requirements become harder to satisfy due to smaller unit interval
Solution Approach 1:
The patent implements dynamic timing optimization by configuring the first and second multiplexers with different delay characteristics tailored to their specific functions. The first multiplexer is optimized for fast selection-to-output response (less than unit interval delay) while the second multiplexer is optimized for data output (less than two unit intervals delay), enabling the system to adapt to higher data rates without violating timing constraints.
3Productivity
If multiplexer loading is increased to drive feedback loop, then signal processing capability improves, but delay increases violating timing constraints
Solution Approach 1:
The patent segments the multiplexer loading functions into two separate multiplexers, allowing the first multiplexer to drive the h1 unrolling loop with minimal selection-to-output delay while the second multiplexer handles feedback loop driving with acceptable data output delay. This segmentation prevents excessive loading on a single multiplexer, thereby reducing overall delay and meeting timing constraints.
Data Source
AI summary
A speculative decision feedback equalizer with split unroll multiplexers is provided. The speculative decision feedback equalizer splits an unroll multiplexer into two multiplexers. One split multiplexer provides a data path for the unroll selection signal, and the other split multiplexer provides a separate data path for the summer differential tap. In this way, the loading of an input stage of the summer circuit and the loading from the h1 unrolling loop are decoupled, allowing each split multiplexer to be configured according to a specific timing requirement along a respective data path. Thus, timing performance of the speculative decision feedback equalizer is improved.