Speculative Execution Processor Side Channel Attack Protection

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Solution Overview

Problem

Speculative execution processors are vulnerable to side channel attacks, and existing solutions to protect them often result in significant performance degradation.

Innovation Solution

A system that separates the execution and commit stages by storing speculative instructions in an internal cache memory inaccessible to external processing units and copying only the committed code segment into an external memory, while measuring and delaying the commit time to maintain security without compromising performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If speculative instructions are stored in an internal cache memory inaccessible to external processing units, then security against side channel attacks is improved, but access speed and performance deteriorate

Engineering Contradiction:
ImprovesecurityVSAvoidaccess speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent divides memory into two distinct segments: an internal cache memory for speculative instructions that is inaccessible to external processing units, and an external memory for committed instructions that is accessible. This segmentation isolates speculative operations to protect against side channel attacks while maintaining normal memory access for committed operations, thereby resolving the contradiction between security and access speed.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the commit stage is delayed to maintain security, then security against side channel attacks is improved, but system productivity deteriorates

Engineering Contradiction:
ImprovesecurityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-executing instructions speculatively in the internal cache memory before formal commitment. This allows the system to prepare results in advance during the first time period, then quickly commit them during the second time period without causing significant delays to overall system productivity, while maintaining security through the isolated execution environment.

Inventive Principle:
Principle #10Preliminary action

3Speed

If speculative execution is performed ahead of time, then processing speed is improved, but vulnerability to side channel attacks increases

Engineering Contradiction:
Improveprocessing speedVSAvoidvulnerability to attacks
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary mechanism - the internal cache memory that is inaccessible to external processing units - between the speculative execution engine and the external system. This intermediary allows speculative execution to proceed at high speed while preventing external observers from gaining information through side channel attacks, thus resolving the contradiction between processing speed and security vulnerability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12189762B2Secured speculative execution processor
Publication Date: 2025.01.07 TECHNION RES & DEV FOUND LTD
  • US12189762B2 patent drawing
  • US12189762B2 patent drawing
  • US12189762B2 patent drawing

AI summary

A system, a method and a computer program product for protecting a speculative execution processor from side channel attacks, are disclosed. The system comprises a processing circuitry which performs an execution of a code segment, in one time period and copies, in another time period, only a committed portion of the executed code segment into a memory component which is accessible to read actions by an external processing unit. The speculative instructions are stored in an internal cache memory which is not accessible to read actions by the external processing unit.