Speculative Retirement of Lock Instructions

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Solution Overview

Problem

The strict application of atomic and fencing properties in lock instructions leads to processor slowdowns due to the need for younger instructions to wait for older instructions to complete, resulting in delays and reduced processing speed.

Innovation Solution

The processor allows speculative retirement of lock instructions and younger instructions before the store operation of the lock instruction commits, and if a violation of the atomic or fencing properties is detected, it rolls back the state and executes the lock instruction in a 'slow' mode where younger instructions are not allowed to execute until the store is committed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If strict application of atomic and fencing properties is enforced in lock instructions, then memory access ordering and atomicity are guaranteed, but processor speed decreases due to instruction waiting delays

Engineering Contradiction:
Improvememory access atomicity and orderingVSAvoidprocessor execution speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies dynamics by making the enforcement of atomic and fencing properties conditional rather than static. The processor dynamically adjusts between speculative execution mode (relaxed enforcement) and strict enforcement mode based on violation detection. Instructions can speculatively retire before the lock instruction completes, but the system dynamically reverts to strict ordering if violations are detected, optimizing performance while maintaining correctness.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent replaces the mechanical waiting mechanism (where younger instructions must physically wait for older lock instructions to complete) with a speculative execution mechanism. Instead of enforcing strict ordering through hardware blocking, the system allows out-of-order retirement and uses validation logic to detect and rollback violations, substituting physical constraints with logical verification.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If younger instructions are allowed to execute before lock instruction completes, then processing speed increases, but atomic and fencing properties may be violated

Engineering Contradiction:
Improveinstruction retirement speedVSAvoidatomic and fencing property compliance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by allowing instructions to speculatively retire before the lock instruction's store operation completes. The system performs the retirement action in advance, anticipating that no violations will occur. Validation logic continuously monitors for violations, and if detected, the system rolls back the speculative retirement, thus achieving speed improvement without compromising reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through validation logic that monitors memory access patterns and detects violations of atomic or fencing properties. When a violation is detected, the system provides feedback by rolling back the speculative execution and re-executing instructions in strict order. This closed-loop feedback mechanism ensures property compliance while enabling performance optimization during normal operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3296872B1Speculative retirement of post-lock instructions
Publication Date: 2019.01.02 ADVANCED MICRO DEVICES INC
  • EP3296872B1 patent drawingFigure 1
  • EP3296872B1 patent drawingFigure 2
  • EP3296872B1 patent drawingFigure 3A

AI summary

Techniques for improving execution of a lock instruction are provided herein. A lock instruction and younger instructions are allowed to speculatively retire prior to the store portion of the lock instruction committing its value to memory. These instructions thus do not have to wait for the lock instruction to complete before retiring. In the event that the processor detects a violation of the atomic or fencing properties of the lock instruction prior to committing the value of the lock instruction, the processor rolls back state and executes the lock instruction in a slow mode in which younger instructions are not allowed to retire until the stored value of the lock instruction is committed. Speculative retirement of these instructions results in increased processing speed, as instructions no longer need to wait to retire after execution of a lock instruction.