Speculative Probe Prediction Unit for Cache Coherency Latency

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Solution Overview

Problem

Cache to cache data transfers in multi-node computer systems are hindered by high latency due to serial operations and the need for maintaining coherency across multiple nodes, which affects performance, especially in distributed memory architectures.

Innovation Solution

Implementing a prediction unit in each processing node that generates speculative probes to retrieve data from other nodes' caches in parallel with memory requests, reducing latency by predicting data location and initiating early retrieval if correct, and discarding or writing back data if the prediction is incorrect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data transfer between cache subsystems of different nodes is performed using traditional serial operations to maintain coherency, then data coherency is maintained, but transfer latency increases significantly

Engineering Contradiction:
Improvedata coherencyVSAvoidtransfer latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a prediction unit that performs preliminary actions by predicting which cache lines will be requested by other nodes before the actual requests occur. The prediction unit monitors memory requests and proactively initiates data transfer operations in advance, so that when the actual requests arrive, the data is already in the cache subsystem, thereby reducing transfer latency while maintaining coherency through the predictive approach

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the cache subsystem into multiple independent prediction units, each responsible for predicting requests from specific other nodes. This segmentation allows parallel prediction operations to occur simultaneously for different node pairs, reducing overall prediction and transfer latency while maintaining coherency for each segmented prediction task independently

Inventive Principle:
Principle #1Segmentation

2Loss of time

If multiple cache coherency operations are performed in parallel to reduce latency, then transfer speed improves, but system complexity increases

Engineering Contradiction:
Improvetransfer latencyVSAvoidcoherency protocol complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The prediction unit is designed as a multi-functional component that performs multiple tasks: monitoring memory requests, predicting which cache lines will be requested, identifying the target nodes, and initiating data transfer operations. This universal component handles all prediction and initiation functions in one unit, reducing overall system complexity compared to having separate components for each function while still enabling parallel coherency operations to reduce latency

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10503648B2Cache to cache data transfer acceleration techniques
Publication Date: 2019.12.10 ADVANCED MICRO DEVICES INC
  • US10503648B2 patent drawing
  • US10503648B2 patent drawing
  • US10503648B2 patent drawing

AI summary

Systems, apparatuses, and methods for accelerating cache to cache data transfers are disclosed. A system includes at least a plurality of processing nodes and prediction units, an interconnect fabric, and a memory. A first prediction unit is configured to receive memory requests generated by a first processing node as the requests traverse the interconnect fabric on the path to memory. When the first prediction unit receives a memory request, the first prediction unit generates a prediction of whether data targeted by the request is cached by another processing node. The first prediction unit is configured to cause a speculative probe to be sent to a second processing node responsive to predicting that the data targeted by the memory request is cached by the second processing node. The speculative probe accelerates the retrieval of the data from the second processing node if the prediction is correct.