Speech Recognition Circuit Using Content Addressable Memory
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Solution Overview
Problem
Existing speech recognition systems in mobile devices face challenges due to limited power, memory, and noise, making it difficult to implement effective speech recognition with medium to large vocabularies.
Innovation Solution
A speech recognition circuit utilizing a content addressable memory (CAM) system architecture, which maps lexical tree searches and includes a distance calculation engine to calculate Mahalanobis distances, allowing for efficient state identification and scoring updates, and a selector circuit to optimize node selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a medium to large vocabulary is required for speech recognition, then speech recognition accuracy is improved, but memory requirements and computational resources increase significantly
Solution Approach 1:
The lexical tree is segmented into multiple levels and subsets, with each CAM storing a specific portion of the lexical tree. The search process is divided into multiple stages, where each CAM processes a segment of the vocabulary, reducing the memory burden on any single device while maintaining comprehensive vocabulary coverage for accurate speech recognition
Solution Approach 2:
The patent introduces a hierarchical dimensional structure to the lexical tree organization, utilizing multiple CAM devices arranged in a distributed architecture. This dimensional expansion allows the system to handle large vocabularies by distributing lexical data across multiple spatial dimensions (multiple CAMs) rather than concentrating it in a single memory structure
2Reliability
If more memory and resources are provided in mobile electronic devices, then speech recognition performance is improved, but device size and cost increase
Solution Approach 1:
The patent extracts the heavy memory burden from the mobile device by implementing a distributed CAM architecture where lexical tree data is partitioned across multiple independent memory devices. Each CAM stores only a portion of the lexical tree, allowing the system to achieve large vocabulary support without requiring a single large memory component that would increase device size
Solution Approach 2:
The CAM-based lexical tree search structure serves multiple functions simultaneously: it enables large vocabulary recognition, reduces per-device memory requirements, and provides a scalable architecture that can be adapted to different mobile device form factors. The same architectural approach can be applied regardless of device size constraints
3Measurement precision
If a complex speech model and intensive computation are used to handle noisy environments, then speech recognition accuracy in noise is improved, but power consumption and computational load increase
Solution Approach 1:
The lexical tree is pre-organized into a CAM-optimized structure with pre-computed node identifiers and hierarchical relationships. This preliminary organization enables efficient search operations during speech recognition, reducing the computational load required to handle noisy speech by eliminating the need for complex real-time processing of unstructured lexical data
Solution Approach 2:
The patent replaces traditional sequential memory access and complex computational searches with CAM-based parallel content-addressable lookup. This substitution of the search mechanism dramatically reduces computational requirements and power consumption while maintaining or improving speech recognition accuracy in noisy environments
4Ease of manufacture
If traditional memory structures are used for lexical tree storage, then implementation is simpler, but lookup efficiency and score update speed decrease
Solution Approach 1:
The patent introduces CAM devices as intermediary structures between the processor and the lexical tree data. These CAMs serve as specialized memory mediators that provide parallel content-addressable access to lexical nodes, significantly improving lookup efficiency and score update speed compared to traditional sequential memory structures while maintaining implementation feasibility through standardized memory interfaces
Data Source
AI summary
A speech recognition circuit comprising a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to said state identifiers, the lexical tree comprising a model of words; a memory structure for receiving and storing state identifiers identified by a node identifier identifying a node or group of adjacent nodes, said memory structure being adapted to allow lookup to identify particular state identifiers, reading of the scores corresponding to the state identifiers, and writing back of the scores to the memory structure after modification of the scores; an accumulator for receiving score updates corresponding to particular state identifiers from a score update generating circuit which generates the score updates using audio input, for receiving scores from the memory structure, and for modifying said scores by adding said score updates to said scores; and a selector circuit for selecting at least one node or group of adjacent nodes of the lexical tree according to said scores.