SPI Bus Frame Sequencing for Synchronous Data Integrity

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Solution Overview

Problem

The existing SPI protocol lacks data integrity control and does not enable simultaneous two-way communication, making it unsuitable for applications requiring maximum functional safety in motor vehicle systems, such as mutual verification between computers via a full-duplex synchronous communication.

Innovation Solution

The method involves encapsulating data in frames with a frame identifier and control field, including a checksum, and using a predetermined sequencing for simultaneous frame exchange between master and slave communication modules, with integrity checking steps to detect communication errors and interrupt transmission upon error detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the SPI protocol is used for synchronous data transmission, then transmission speed and simultaneous two-way communication are improved, but data integrity control and error detection are lost

Engineering Contradiction:
Improvetransmission speedVSAvoiddata integrity control
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The data transmission is segmented into structured frames with distinct fields: frame identifier (for error detection and sequencing), data field (for payload), and control field (for additional control information). This segmentation allows simultaneous optimization of transmission efficiency and data integrity verification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The receiving module verifies data integrity by checking the frame identifier against expected values and validates the control field content. Error detection feedback mechanisms are implemented to identify transmission errors without requiring retransmission protocols, maintaining high-speed communication while ensuring reliability.

Inventive Principle:
Principle #23Feedback

2Reliability

If frame structure with identifiers and control fields is added to SPI protocol, then data integrity and error detection are improved, but communication protocol complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidcommunication protocol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The frame structure implements local quality by dedicating specific fields for specific functions: frame identifier for error detection, control field for transmission control, and data field for payload. This localized functional assignment simplifies the verification process at each stage while maintaining overall protocol simplicity.

Inventive Principle:
Principle #3Local quality

3Loss of time

If simultaneous two-way communication is implemented, then response time is reduced, but error detection and mutual verification become difficult

Engineering Contradiction:
Improveresponse timeVSAvoidmutual verification
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The communication protocol implements periodic action through predetermined sequencing of frame identifier pairs. Each transmission cycle follows a defined sequence where master and slave modules exchange frames with correlated identifiers, enabling mutual verification of synchronous communication while maintaining real-time response capabilities.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11106619B2Transmission of synchronous data via a serial data bus, in particular a SPI bus
Publication Date: 2021.08.31 VALEO SYST THERMIQUES SAS
  • US11106619B2 patent drawing
  • US11106619B2 patent drawing
  • US11106619B2 patent drawing

AI summary

The invention concerns the transmission of synchronous data between a master communication module and a slave communication module via a serial data bus, in particular a SPI bus. According to the invention, the data to be transmitted by each of the two master and slave communication modules are encapsulated in a data field (31) of at least one frame further comprising a frame identifier (30), and two frames are exchanged simultaneously between the two master and slave communication modules according to at least one predefined sequencing corresponding to a unique pairing of the identifiers of the two frames exchanged simultaneously. The integrity of a communication can therefore be controlled by verifying the sequencing of the exchanged frames.