SPI Bus Register Access for Chip Verification

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The complexity of modern chip manufacturing has made traditional register verification methods cumbersome and prone to errors, especially as chips integrate more functional modules with multiple dedicated registers, leading to disorganized hierarchical logic and increased error probabilities.

Innovation Solution

A chip verification method based on SPI (Serial Peripheral Interface) that allows access to registers without relying on the chip bus, using the SPI bus to drive parameter information and perform read/write operations on registers, thereby reducing access errors and improving verification efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the chip bus is used to access registers, then the access method is simple, but the probability of access errors increases and the chip bus becomes overloaded

Engineering Contradiction:
Improveaccess method simplicityVSAvoidaccess error probability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent segments the register access function from the chip bus by introducing a dedicated SPI bus for register access. The chip bus is divided into its original function (data processing) while the SPI bus handles register access, thereby reducing the chip bus burden and eliminating access errors caused by bus conflicts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an SPI interface as an intermediary between the external device and the chip registers. This intermediary provides a dedicated communication path for register access, isolating it from the chip bus and preventing the errors that occur when both share the same bus.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple functional modules are integrated in the chip, then the chip functionality increases, but the verification complexity increases

Engineering Contradiction:
Improvechip functionalityVSAvoidverification complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the verification process by module, where each functional module's registers can be independently accessed and verified through the SPI bus. This modular approach to verification reduces the overall complexity compared to verifying all registers through a shared chip bus.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each functional module can be independently verified through its own register access via the SPI bus, allowing modules to be tested in isolation. This self-service verification approach simplifies the overall verification process for multi-functional chips.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If all register access methods are mixed together, then the access flexibility increases, but the error probability significantly increases

Engineering Contradiction:
Improveaccess flexibilityVSAvoiderror probability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments register access methods into distinct pathways: the chip bus for data processing and the SPI bus for register access. This segmentation maintains access flexibility while eliminating the errors that arise from mixing access methods on a single bus.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The SPI interface acts as a dedicated intermediary for register access, separating it from the chip bus operations. This intermediary structure preserves the flexibility of multiple access methods while preventing the errors caused by their mixing on the same bus.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250117302A1Chip verification method based on spi
Publication Date: 2025.04.10 IPGOAL MICROELECTRONICS (SICHUAN) CO LTD
  • US20250117302A1 patent drawing
  • US20250117302A1 patent drawing

AI summary

A chip verification method based on SPI includes steps of (a) obtaining parameter information of a module of a chip under test and a corresponding register; (b) writing a test case for the module; (c) driving the parameter information in the test case onto an SPI bus at a top level of the chip under test through a driver, accessing a register of the module; (d) verifying the access result to determine whether the register is normal; (e) repeating steps (b) to (d) until all registers of the current module have been verified; and (f) repeating steps (a) to (e) until all modules of the chip have been verified. The method does not require using the chip bus to access its registers, thus alleviating the burden on the chip bus, reducing the probability of access errors, and improving the efficiency of chip verification.