SPI Circuit Calibration via Replaceable Pull-Up Resistors

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

During the manufacturing process, short circuits between the MISO and MOSI lines in SPI circuits can cause incorrect logic results due to pulled-down SPI transmission voltage, leading to data transmission failures.

Innovation Solution

Incorporating replaceable resistors in the connections between the MISO and MOSI lines, with the option to replace them with resistors of higher resistance if the initial voltages do not meet the high-level input voltage requirements, allowing for calibration of transmission voltages to maintain correct logic levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conducting lines are used to implement SPI signal lines, then the SPI communication interface can be established, but short circuits between MISO and MOSI lines may occur causing voltage pull-down and incorrect logic results

Engineering Contradiction:

ImproveSPI communication reliabilityVSAvoidshort circuit between MISO and MOSI lines

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces pull-up resistors as intermediary elements between the MISO and MOSI lines and the power supply voltage. These resistors act as mediators that prevent direct short circuits from causing complete voltage collapse by providing an alternative current path to the power supply, thereby maintaining sufficient voltage levels for reliable logic detection even when short circuits occur.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies beforehand cushioning by pre-installing pull-up resistors in the circuit design before short circuits can occur. These resistors provide advance protection by ensuring that even if short circuits happen during manufacturing or operation, the voltage levels will be buffered and maintained above the minimum thresholds required for correct logic recognition, thus cushioning against the harmful effects of short circuits.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If pull-up resistors are added to prevent short circuit effects, then voltage levels can be maintained, but the circuit complexity increases

Engineering Contradiction:

Improvelogic level detection accuracyVSAvoidcircuit component quantity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The pull-up resistors serve multiple functions simultaneously: they provide the necessary pull-up current to maintain voltage levels during normal operation, and they act as protective elements against short circuit effects. By making these components multi-functional, the patent avoids adding separate protection circuits, thereby limiting the increase in circuit complexity while still improving reliability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If resistor values are increased to compensate for voltage drop, then logic high levels can be maintained, but the current consumption increases

Engineering Contradiction:

Improvehigh-level voltage maintenanceVSAvoidcurrent consumption through resistors

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by carefully selecting and optimizing the resistance values of the pull-up resistors. Instead of using fixed or extreme resistance values, the patent determines specific resistance ranges that balance two competing requirements: maintaining sufficient voltage levels for reliable logic high detection while limiting the current consumption to acceptable levels. This optimization of resistance parameters resolves the contradiction between voltage maintenance and energy consumption.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively adjusts the transmission voltages to ensure correct logic levels are maintained even in cases of short circuits, minimizing data transmission failures and ensuring proper functionality of SPI devices.

Implementation Method 1

a first resistor connecting the MISO line and the first conducting line, and a second resistor connecting the MOSI line and the second conducting line

Methodology Applied

Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11768785B2Serial peripheral interface circuit and calibration method of serial peripheral interface system

Publication Date: 2023.09.26 PRIME WORLD INT HLDG LTD

AI summary

A serial peripheral interface circuit includes a serial peripheral interface device with a master-in-slave-out (MISO) line, a master-out-slave-in (MOSI) line, a serial clock (SCLK) line and a slave select (SS) line, a first conducting line, a second conducting line, a first resistor connecting the MISO line and the first conducting line, and a second resistor connecting the MOSI line and the second conducting line.