SPI Controller Cluster for Intra-System Communication

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In real-time, low-power applications and time-critical heterogeneous environments, load balancing on processors, even high-speed multi-core processors, is inefficient and difficult to program, and existing internal computer-system communications face distance and timing limitations, making them less effective in larger systems.

Innovation Solution

A Serial Peripheral Interface (SPI) management system is introduced, utilizing an SPI cluster electrical interface as an intermediary between an SPI controller and a cluster of SPI interface components to manage communication between processors and peripheral devices, allowing for longer connections and precise timing control through synchronous serial communications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If existing internal computer-system communications methods are used, then communication speed is maintained, but distance and timing limitations arise that minimize usefulness in larger systems

Engineering Contradiction:
Improvecommunication distanceVSAvoidtiming precision
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent introduces an SPI controller as an intermediary component between the processor and peripheral devices. This intermediary manages communication protocols and timing, allowing extended communication distances while maintaining timing precision through dedicated hardware control rather than direct processor-to-peripheral communication.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If processor load balancing is implemented in real-time applications, then task distribution is achieved, but programming complexity and efficiency deteriorate

Engineering Contradiction:
Improvetask distribution efficiencyVSAvoidprogramming complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The SPI controller operates as a self-service component that autonomously manages communication tasks, data transfer, and timing operations. By delegating these repetitive communication functions to the dedicated controller, the processor is freed from managing low-level communication protocols, reducing programming complexity while maintaining high productivity in real-time applications.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If SPI protocol is used for short distance single master communication, then timing precision is maintained, but system scalability and adaptability are limited

Engineering Contradiction:
Improvesystem scalabilityVSAvoidtiming control
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The SPI controller is designed as a universal interface that can manage multiple SPI peripherals and support various communication modes. It maintains the precise timing characteristics of the SPI protocol while providing the adaptability to scale systems with multiple devices, effectively combining the timing precision of single-master SPI with the versatility needed for larger systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9904644B2Systems and methods of using an SPI controller
Publication Date: 2018.02.27 GOODRICH CORP
  • US9904644B2 patent drawing
  • US9904644B2 patent drawing
  • US9904644B2 patent drawing

AI summary

A system for managing internal-computer system communications including a processor, an SPI controller, an interconnector, and an SPI cluster containing multiple SPI interfaces, with the SPI interfaces being connected to one or more devices in the computer system or environment. The SPI cluster includes SPI interfaces that can convert communications to/from a plurality of device's formats to serialized digital formats suitable for ingest and actuation for the SPI controllers. The interconnector may use a differentially, optically, galvanometrically, inductively coupled driven wire and to enable communications between the SPI cluster constituents and the SPI controller. The SPI controller manages communications to the SPI interfaces that act as coordinated intermediates for device control and communications, thus insulating the computer system's processor from the increased workload of managing all internal system communications.