SPI Controller DMA Batch Register Updates

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Solution Overview

Problem

Existing SPI controllers face challenges in achieving flexible configuration, compatibility, and continuous transmission speed, often prioritizing one aspect over the others, leading to inefficiencies in CPU resource utilization and register updates across multiple modules.

Innovation Solution

An SPI controller with an SPI clock signal generator, register group, input/output controller, and state machine, coupled with a DMA controller, enables flexible configuration, efficient data transmission, and batch updates of register groups with minimal CPU intervention, using a DMA-controlled segmented configuration transmission mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the CPU adjusts the operating configuration of the SPI controller to ensure compatibility with different SPI devices, then the adaptability and versatility of the SPI controller is improved, but the CPU overhead increases and transmission continuity is degraded due to long waiting time between successive transmissions

Engineering Contradiction:
ImproveSPI controller compatibilityVSAvoidtransmission speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-configuring multiple operating configuration sets in the SPI controller's register group before transmission begins. The CPU only needs to select and load a pre-prepared configuration set corresponding to the target SPI device type, rather than adjusting parameters in real-time during transmission. This significantly reduces CPU overhead and eliminates waiting time between successive transmissions, thereby improving transmission speed while maintaining compatibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service by enabling the SPI controller to automatically switch between different operating configuration sets based on the detected SPI device type. The controller autonomously selects the appropriate configuration from its internal register group without requiring continuous CPU intervention, thus reducing CPU overhead and maintaining high transmission speed while ensuring compatibility with various SPI devices.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If the CPU updates the register group of the SPI controller for each transmission to maintain flexible configuration, then the adaptability is improved, but the CPU utilization deteriorates due to increased overhead

Engineering Contradiction:
Improveconfiguration flexibilityVSAvoidCPU resource utilization
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-configuring multiple operating configuration sets in the SPI controller's register group before transmission begins. The CPU only needs to select and load a pre-prepared configuration set corresponding to the target SPI device type, rather than adjusting parameters in real-time during transmission. This significantly reduces CPU overhead and eliminates waiting time between successive transmissions, thereby improving transmission speed while maintaining compatibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service by enabling the SPI controller to automatically switch between different operating configuration sets based on the detected SPI device type. The controller autonomously selects the appropriate configuration from its internal register group without requiring continuous CPU intervention, thus reducing CPU overhead and maintaining high transmission speed while ensuring compatibility with various SPI devices.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If the SPI controller supports multiple data channel modes and clock modes to enhance compatibility, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
ImproveSPI device compatibilityVSAvoidcontroller configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the SPI controller's configuration into multiple independent operating configuration sets, each stored as a separate record in the register group. Each configuration set contains all necessary parameters (clock mode, data channel mode, sampling mode, etc.) as a complete unit. This modular segmentation allows the controller to switch between different SPI device types by simply loading a complete configuration set, rather than manually adjusting individual parameters, thereby reducing configuration complexity while maintaining support for multiple modes and high compatibility.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12135677B2Enhanced SPI controller and SPI controller operating method
Publication Date: 2024.11.05 ESPRESSIF SYST SHANGHAI
  • US12135677B2 patent drawing
  • US12135677B2 patent drawing
  • US12135677B2 patent drawing

AI summary

Disclosed are an SPI controller and a method of operating an SPI controller. The SPI controller includes: an SPI clock signal generator; a register group configured to store SPI operating configuration of the SPI controller; SPI pins configured to connect to one or more SPI peripherals;and an input/output controller configured to perform data input or output between the SPI controller and the SPI peripherals according to the SPI clock signal and the SPI operating configuration; an SPI state machine configured to control a working state of the SPI controller. The SPI controller is electrically coupled via a bus to a CPU, a DMA controller, and a system memory located outside the SPI controller; and the input/output controller is further configured to receive an updated SPI operating configuration from the DMA controller and to update the updated SPI operating configuration into the register group between two consecutive SPI transmissions.