SPI Serial Flash DDR Transmission Speed
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Solution Overview
Problem
The existing SPI serial flash technology has a limited data output rate, which restricts its performance and efficiency due to its serial nature, requiring a method to enhance data transmission speed while maintaining a compact pin configuration.
Innovation Solution
Implementing a double data rate (DDR) transmission method by doubling the system clock frequency and optimizing the timing of data, command, and address transmission, allowing for improved data output, command input, and programmed data input rates without increasing the number of pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If SPI serial flash uses serial interface with fewer pins, then board area and system cost are reduced, but data output rate is limited to 50 MHz
Solution Approach 1:
The patent changes the clock frequency parameter from 50 MHz to 75 MHz, and implements double data rate transmission where two bits are accessed during one clock period. This parameter change enables the data output rate to reach 150 MHz while maintaining the compact four-pin SPI interface configuration.
2Speed
If clock rate of SCK is increased to improve data output rate, then data transmission speed improves, but control circuit complexity increases
Solution Approach 1:
The patent makes the serial data input pin (Pin SI) serve dual functions: it can receive commands and addresses during input operations, and it can also function as an additional output pin during data output operations. This multi-functionality allows the four-pin interface to achieve 150 MHz data rate without requiring additional pins or complex control circuits.
3Device complexity
If only one output pin is used in SPI serial flash, then pin configuration remains compact, but data output rate is limited
Solution Approach 1:
The patent enables the serial data input pin (Pin SI) to function as a bidirectional pin that can serve as both input and output. During read operations, this pin outputs data alongside Pin SO, effectively providing two output channels using the same physical pin, thereby doubling the data output rate to 150 MHz while maintaining the compact four-pin configuration.
Data Source
AI summary
A transmission method for a serial periphery interface (SPI) serial flash includes the steps of providing a first system clock signal and transmitting a plurality of data strings with each two bits of the data strings transmitted in a period of the first system clock signal. A second system clock signal is generated by the first system clock signal to provide a double frequency to enhance the transmission rate of all the data inputted into or outputted from the SPI serial flash.