SPI Flash Status Register Write Method via Volatile Latch

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Solution Overview

Problem

The frequent updates to write-protected data in the status register of NOR type flash memory with a Serial Peripheral Interface (SPI) lead to damage and a reduced lifetime of the flash memory due to the high number of writes to non-volatile memory cells.

Innovation Solution

A writing method for a serial interface flash memory apparatus that involves writing update-protected data to a volatile type latch and setting an update flag, with the data being written to the status register during a power down process, reducing the number of updates to the non-volatile status register.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If write-protected data in the status register is frequently updated, then the functionality and adaptability of the flash memory are improved, but the lifetime and reliability of the flash memory deteriorate due to high number of writes to non-volatile memory cells

Engineering Contradiction:

Improvewrite-protected data update capabilityVSAvoidflash memory lifetime

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the status register into two parts: a volatile latch for frequent write-protected data updates and a non-volatile status register for stable storage. This segmentation allows write-protected data to be updated in the latch without affecting the lifetime of the non-volatile memory cells, resolving the contradiction between update capability and reliability

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a volatile latch as an intermediary between the host and the non-volatile status register. Write-protected data is first written to the latch, and only updated to the status register under specific conditions (power down, power up, or reset). This intermediary mechanism reduces the frequency of writes to the non-volatile memory, improving reliability while maintaining update functionality

Inventive Principle:

Principle #24Intermediary (Mediator)

2Duration of action of stationary object

If write-protected data is updated directly to the non-volatile status register, then the data persistence is improved, but the write cycle count increases causing faster wear of memory cells

Engineering Contradiction:

Improvedata persistenceVSAvoidmemory cell lifetime

Core Design Contradiction:

Duration of action of stationary objectVSDuration of action of moving object

Solution Approach 1:

The patent performs preliminary action by writing write-protected data to the volatile latch first, before potentially updating the non-volatile status register. This preliminary storage in the latch allows the system to defer the actual update to non-volatile memory until necessary (power down, power up, or reset), reducing write cycle count and extending memory cell lifetime while ensuring data persistence

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8751730B2Serial interface flash memory apparatus and writing method for status register thereof

Publication Date: 2014.06.10 WINBOND ELECTRONICS CORP

AI summary

A serial interface flash memory apparatus and a writing method for a status register thereof are disclosed. The writing method for the status register mentioned above includes: receiving a write command with an updated data for the status register; writing the updated data to a volatile latch and set an update flag according to whether or not a write-protected data in the status register is updated by the write command; and writing the data from the volatile latch to the status register according to the update flag when a power down process of the serial interface flash memory apparatus is processed.