Hierarchical Model Bin Inheritance for SPICE Simulation Overhead
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Solution Overview
Problem
Circuit designers face inefficiencies in managing model binning due to redundant model parameter specifications and complex model selection processes in SPICE-like simulators, leading to slow performance and high memory usage, especially with small geometry processes requiring numerous model parameters and complex expressions.
Innovation Solution
The introduction of hierarchical model groups with inheritable bin models and new syntax semantics allows for the specification of models spanning binning dimensions, reducing redundancy and enabling indirect and optional inheritance, thereby simplifying model parameter specifications and improving model selection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple individual bin models are specified for each device geometry range, then model accuracy is improved, but parameter specification redundancy increases and management complexity worsens
Solution Approach 1:
The model group is segmented into multiple bins based on device geometry ranges (length and width), with each bin containing only the parameters that differ from the parent model. This segmentation allows accurate modeling for different device sizes while reducing redundancy by storing only unique parameters at each bin level.
Solution Approach 2:
The patent introduces a hierarchical dimension to model organization, creating a tree structure with parent models at higher levels and specialized bin models at lower levels. This dimensional change from flat to hierarchical organization enables inheritance of common parameters from parent models, significantly reducing specification redundancy while maintaining model accuracy for specific geometry ranges.
2Measurement precision
If numerous model parameters and complex expressions are used for small geometry processes, then model accuracy is improved, but simulation performance deteriorates due to slow processing and high memory usage
Solution Approach 1:
The patent extracts common parameters from multiple bin models and places them in a parent model. Each bin model then contains only the specific parameters that differ from the parent, reducing the total number of parameters that need to be processed during simulation. This extraction significantly reduces memory usage and processing time while maintaining full model accuracy.
3Ease of operation
If automatic model selection is implemented to simplify model group management, then ease of operation is improved, but processing time increases and memory consumption increases
Solution Approach 1:
The patent applies local quality by organizing parameters hierarchically so that each bin model contains only the local, specific parameters needed for that geometry range. This localized parameter storage reduces the overall data structure size, enabling faster model selection and reduced memory consumption while maintaining ease of automatic model group management.
Data Source
AI summary
A system, method, and computer program product for facilitating model binning in circuit simulators. Embodiments enable specification of models spanning binning dimensions, such as device width and length, in a model group via inheritable model bins. New simulator modeling syntax and semantics eliminate much of the redundancy and parsing overhead from model parameter specifications in foundry process design kits. Indirect and optional inheritance is also enabled, allowing for fine grain and coarse grain grids in the same model group.