SPICE Resistor Model Segmentation for Parasitic Resistance

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Solution Overview

Problem

In semiconductor integrated circuit modeling simulations, the accuracy of resistor simulations is compromised due to parasitic resistance formed by contact plugs and metal leads, which are not accurately accounted for in existing models, and temperature variations also affect resistance values, leading to reduced simulation accuracy.

Innovation Solution

The resistor is divided into a bulk resistor and a parasitic resistor, with the parasitic resistor further split into a terminal resistor and a contact resistor, allowing for the analysis and inclusion of their resistance values and temperature coefficients in the simulation model, enhancing the simulation accuracy using SPICE.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a simple resistor simulation model is used in SPICE, then the ease of manufacture and operation is improved, but the simulation accuracy deteriorates due to unaccounted parasitic resistance

Engineering Contradiction:
Improvesimulation accuracyVSAvoidmodel complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The resistor is divided into multiple components: a bulk resistor representing the main resistive element, and separate parasitic resistors representing contact resistance and terminal resistance. This segmentation allows each component to be modeled independently with appropriate temperature coefficients, improving simulation accuracy while maintaining manageable model complexity through modular structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The parasitic resistance elements (contact resistance and terminal resistance) are extracted from the overall resistor model and treated as separate components. This extraction allows the parasitic effects to be explicitly accounted for with their own temperature coefficients, rather than being lumped into a single resistance value, thereby improving simulation accuracy across different temperature conditions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If temperature variations are not considered in the resistor model, then the device complexity is reduced, but the simulation accuracy deteriorates due to temperature-dependent resistance changes

Engineering Contradiction:
Improvesimulation accuracyVSAvoidmodel complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Temperature coefficients of resistance are assigned to each resistor component (bulk resistor, contact resistor, terminal resistor). These parameters enable the model to dynamically adjust resistance values based on temperature variations, accurately capturing the temperature-dependent behavior of the semiconductor device without requiring complex empirical models.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If parasitic resistance from contact plugs and metal leads is ignored, then the model complexity is reduced, but the simulation accuracy deteriorates due to unaccounted harmful factors

Engineering Contradiction:
Improvesimulation reliabilityVSAvoidmodel complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The parasitic resistance elements, which normally represent harmful effects that degrade device performance, are converted into beneficial modeling components. By explicitly including contact resistance and terminal resistance as separate elements with temperature coefficients, the model transforms these previously problematic unaccounted factors into useful components that improve simulation reliability and enable accurate prediction of device behavior under various temperature conditions.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20230214569A1Method and apparatus for device simulation
Publication Date: 2023.07.06 CHANGXIN MEMORY TECH INC
  • US20230214569A1 patent drawing
  • US20230214569A1 patent drawing
  • US20230214569A1 patent drawing

AI summary

A method and apparatus for device simulation are provided. The method includes: establishing a simulation model of a to-be-detected device, where the to-be-detected device includes a first resistor and a parasitic resistor, the parasitic resistor includes a second resistor and a contact resistor, the first resistor is a bulk resistor of the to-be-detected device, the second resistor is a terminal resistor of the to-be-detected device, and the contact resistor is an equivalent resistor of a contact plug on the to-be-detected device; determining temperature coefficients of resistance corresponding to the first resistor, the second resistor, and the contact resistor, and adding the temperature coefficients of resistance to the simulation model; and performing device simulation of Simulation Program with Integrated Circuit Emphasis (SPICE) according to the simulation model.