Memory-Augmented Spiking Neural Network With External Interface
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Solution Overview
Problem
Current neural network systems lack efficient integration of external memory for spiking neural networks, leading to increased communication overhead and requirements for high-precision memory storage, which hinders area-efficient and flexible implementation.
Innovation Solution
A memory-augmented spiking neural network system that incorporates an external memory interface allowing for selective read and write operations using read and write weighting vectors, enabling interaction with external memory through a controller processing unit, which reduces communication and storage requirements by using binary signals and low-precision memory representation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If external memory is integrated into neural network systems, then data storage capacity is improved, but communication overhead increases
Solution Approach 1:
The patent combines memory storage and neural network processing into a unified architecture where memory units serve dual purposes as both storage elements and computational units. This merging eliminates separate communication interfaces between processor and memory, thereby reducing communication overhead while maintaining enhanced storage capacity.
Solution Approach 2:
The patent introduces weight vectors as intermediary elements that mediate between the controller and external memory. These weight vectors enable selective read and write operations, allowing the system to access only relevant data portions, thereby reducing unnecessary communication and energy consumption while maintaining large storage capacity.
2Measurement precision
If high-precision memory storage is used, then data accuracy is improved, but area efficiency deteriorates
Solution Approach 1:
The patent applies different precision requirements to different parts of the memory system. Critical data paths use higher precision storage, while less critical data uses lower precision storage. This local differentiation maintains data accuracy where needed while reducing overall memory area requirements through selective precision application.
Solution Approach 2:
The patent dynamically adjusts memory precision parameters based on operational requirements. By changing precision levels adaptively, the system maintains high data accuracy when needed while reducing memory area consumption during operations that tolerate lower precision, thereby resolving the contradiction between accuracy and area efficiency.
3Productivity
If selective read and write operations are implemented, then processing efficiency is improved, but system complexity increases
Solution Approach 1:
The patent designs the memory interface to perform multiple functions through unified structures. The same interface circuitry handles both read and write operations, and the weight vector mechanism serves both as an addressing mechanism and as a data transformation element. This multi-functionality improves processing efficiency while avoiding the need for separate specialized circuits that would increase complexity.
Data Source
AI summary
The present disclosure relates to a neural network system comprising: a controller including a processing unit configured to execute a spiking neural network, and an interface connecting the controller to an external memory. The controller is configured for executing the spiking neural network, the executing comprising generating read instructions and/or write instructions. The interface is configured for: generating read weighting vectors according to the read instructions, coupling read signals, representing the read weighting vectors, into input lines of the memory, thereby retrieving data from the memory, generating write weighting vectors according to the write instructions, coupling write signals, representing the write weighting vectors, into output lines of the memory, thereby writing data into the memory.