Cross-Point Spin Accumulation Torque MRAM Cell Architecture
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Solution Overview
Problem
Cross-point magnetoresistive random access memory (MRAM) arrays face challenges with sneak current issues, which affect data reliability and increase power consumption due to the need for selection components that compromise between read and write operations, reducing storage density.
Innovation Solution
The implementation of a vertical MRAM cell architecture with spin accumulation lines between read and write lines, featuring separate read and write selectors and magnetic tunnel junctions, allows for independent current paths for reading and writing, enhancing endurance and density while minimizing sneak current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selection components such as transistors or Zener diodes are added to limit sneak current, then data reliability and power consumption improve, but device area increases and storage density decreases
Solution Approach 1:
The patent extracts the selection function from traditional planar components (transistors, diodes) and relocates it to the vertical stack within the cross-point cell itself. The topological design enables sneak current suppression through the inherent vertical current path, eliminating the need for additional lateral selection components and thereby maintaining high storage density while achieving reliable data access.
Solution Approach 2:
The patent transitions from a planar two-dimensional cross-point architecture to a three-dimensional vertical stack architecture. By stacking multiple functional layers (electrodes, magnetic tunnel junctions, spin accumulation lines) vertically, the design enables independent control of read and write currents through separate vertical paths, suppressing sneak currents without requiring additional lateral area for selection components.
2Reliability
If selection components are added to suppress sneak current, then read operation reliability improves, but write operation performance and endurance deteriorate due to compromised design
Solution Approach 1:
The patent segments the current paths into distinct vertical channels: a write current path through the spin accumulation line and a read current path through the magnetic tunnel junction. This segmentation allows independent optimization of read and write operations, enabling reliable read operations with low sneak current while maintaining robust write operation performance and endurance without compromise.
Solution Approach 2:
The patent introduces spin accumulation lines as intermediary elements between write electrodes and magnetic tunnel junctions. These spin accumulation lines mediate the write operation by generating spin-polarized current that acts on the magnetic moment, while the vertical topology ensures that read operations bypass this intermediate structure, allowing independent optimization of both operations.
3Device complexity
If traditional cross-point architecture is used without spin accumulation lines, then device complexity is low, but sneak current affects data reliability and increases power consumption
Solution Approach 1:
The patent converts the potentially harmful sneak current paths into beneficial vertical current channels. By introducing spin accumulation lines that extend vertically between read and write electrodes, the design transforms what would be lateral leakage paths into controlled vertical paths that contribute to the write operation, thereby suppressing sneak current while maintaining relatively simple device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves data reliability and storage density by reducing sneak current and power consumption, allowing for optimized performance in both read and write operations without compromising on cell area.
Implementation Method 1
A thin dielectric or barrier layer may separate the fixed and free layers, and current may flow across the barrier layer due to quantum tunneling.
Implementation Method 2
means for accumulating magnetic spins adjacent to a means for magnetoresistively storing a data value, to change a stored data value
Implementation Method 3
means for spin-polarizing an electric write current to generate accumulated magnetic spins
Implementation Method 4
Various types of magnetoresistive random access memory (MRAM) store data using magnetic tunnel junctions
Data Source
AI summary
Apparatuses, systems, and methods are disclosed for magnetoresistive random access memory. A plurality of read lines are in a read line layer, and a plurality of write lines are in a write line layer. A plurality of spin accumulation lines are in a spin accumulation line layer disposed between a read line layer and a write line layer. Spin accumulation lines may horizontally cross read lines and write lines. A plurality of vertical magnetoresistive random access memory (MRAM) cells may include polarizers and magnetic tunnel junctions. A vertical MRAM cell may include a polarizer coupled between a spin accumulation line and a write line. A vertical MRAM cell may further include a magnetic tunnel junction coupled between a spin accumulation line and a read line, such that the magnetic tunnel junction and the polarizer are vertically aligned.