Three Terminal Spin Hall MRAM Segmented Wire Architecture
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Solution Overview
Problem
Spin torque MRAM designs face limitations due to high resistivity of the spin hall wire, which restricts the number of bits that can be placed on a single wire, leading to challenges in writing and stability during data operations.
Innovation Solution
The implementation of a separate spin hall wire for each magnetic tunnel junction (MTJ) within the MRAM device, along with a pair of selection transistors connected to opposite ends of the spin hall wire, allows for independent writing of bits along a given word line, enhancing writing efficiency and stability by using a unique spin hall wire for each MTJ.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a common spin hall wire is used for multiple MTJs, then device complexity is reduced, but the number of bits that can be placed on the wire is limited due to high resistivity
Solution Approach 1:
The patent divides the common spin hall wire into multiple separate spin hall wires, with each wire dedicated to a specific MTJ. This segmentation allows each wire to be optimized for lower resistivity and enables more bits to be placed on each wire without the cumulative resistivity problem of a long common wire.
Solution Approach 2:
The patent introduces selection transistors as intermediary components between the spin hall wires and the bit lines. These transistors enable independent control of current flow to each MTJ, allowing selective writing operations while managing the increased number of spin hall wires.
2Quantity of substance
If spin hall wire length is increased to accommodate more bits, then more bits can be written, but writing stability deteriorates due to high resistivity
Solution Approach 1:
By segmenting the long spin hall wire into multiple shorter wires, each wire has lower resistivity and better current delivery characteristics. This ensures stable writing operations for each MTJ while still accommodating multiple bits per wire through the segmented architecture.
Solution Approach 2:
Each spin hall wire is optimized locally for its specific MTJ, with properties tailored to achieve low resistivity and high writing stability. The selection transistors provide local control, allowing independent optimization of writing conditions for each bit without affecting others.
3Reliability
If separate spin hall wires are used for each MTJ, then writing independence is improved, but device complexity increases
Solution Approach 1:
Selection transistors serve as intermediary control elements that manage the complexity of having multiple spin hall wires. They provide a systematic way to control current flow to each wire independently, enabling reliable selective writing while organizing the increased device complexity in a manageable manner.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables reliable and efficient writing of multiple bits without interference, improving data stability and reducing write errors, as each bit can be written independently without affecting adjacent bits, thus increasing the number of bits that can be accommodated on a word line.
Implementation Method 1
In spin torque MRAM, the spin hall effect is leveraged for writing data whereby a spin-polarized current is passed through a spin hall wire which destabilizes the free layer in the MTJs along the spin hall wire
Data Source
AI summary
Improved spin hall MRAM designs are provided that enable writing of all of the bits along a given word line together using a separate spin hall wire for each MTJ. In one aspect, a magnetic memory cell includes: a spin hall wire exclusive to the magnetic memory cell; an MTJ disposed on the spin hall wire, wherein the MTJ includes a fixed magnetic layer separated from a free magnetic layer by a tunnel barrier; and a pair of selection transistors connected to opposite ends of the spin hall wire. An MRAM device and method for operation thereof are also provided.