Spin Injection MRAM Cell with Bit Line Magnetic Field Generation
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Solution Overview
Problem
Conventional semiconductor memory devices, such as MRAM, face challenges in reducing size due to the need for additional write lines and switching elements, which increase cell area and memory size, and struggle with improving memory capacity.
Innovation Solution
The semiconductor memory device incorporates a memory cell block with magnetoresistive elements, phase change elements, or recording elements connected in series and parallel with switching transistors, using a chain structure to reduce cell size and area, and employs spin injection type magnetoresistive elements, phase change elements, or resistance-changing recording layers to minimize cell size and prevent magnetic field interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a write line is added to generate magnetic field for writing data in TMR element, then writing capability is improved, but device complexity and area increase
Solution Approach 1:
The patent extracts the magnetic field generation function from a separate write line and integrates it into the bit line itself. The bit line carries both data signals and generates magnetic fields through spin-polarized current, eliminating the need for dedicated write lines and reducing device complexity while maintaining writing capability.
Solution Approach 2:
The bit line is designed to serve multiple functions: it acts as both a data transmission line and a magnetic field generation line. By making the bit line universal, the patent reduces the total number of lines needed, thereby decreasing device complexity and area without compromising writing capability.
2Reliability
If switching elements are added to read data from TMR element, then reading capability is improved, but cell area increases
Solution Approach 1:
The patent merges the read and write operations into a single bit line. The same bit line that writes data via spin-polarized current also reads data by detecting resistance changes, eliminating the need for separate switching elements and reducing cell area while maintaining reading capability.
Solution Approach 2:
The bit line is designed to perform both reading and writing functions universally. By using the bit line for both operations, the patent reduces the number of components needed per cell, thereby decreasing cell area without sacrificing reading capability.
3Area of moving object
If magnetoresistive elements are connected closer to bit line to reduce cell size, then cell area decreases, but magnetic field interference and write errors increase
Solution Approach 1:
The patent introduces a magnetic tunnel junction structure as an intermediary between the bit line and the TMR element. This structure allows spin-polarized current to be injected efficiently while isolating the TMR element from direct magnetic field interference, enabling close connection without increasing write errors.
Solution Approach 2:
The patent changes the magnetic field generation mechanism from direct current through write lines to spin-polarized current through the bit line. This parameter change allows the bit line to generate magnetic fields locally at the TMR element position, enabling close connection while controlling magnetic field interference through spin polarization rather than direct current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the size of memory cells, minimizes the area of MRAM, and prevents write errors by separating the magnetoresistive elements from the bit line, achieving a cell size comparable to NAND flash memory and improving memory capacity.
Implementation Method 1
the junction resistance value changes in accordance with a cosine of relative angle in the magnetization directions of the first and second ferromagnetic layers. Therefore, the junction resistance value takes the minimum value when the magnetization directions of the first and second ferromagnetic layers are parallel. On the other hand, the junction resistance value takes when the maximum value when the magnetization directions are anti-parallel. This calls tunneling magnetoresistive (TMR) effect.
Implementation Method 2
the magnetoresistive element being a spin injection type and including a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes
Data Source
AI summary
A semiconductor memory device includes a memory cell block including a plurality of memory cells connected in series between first node and second node, the memory cells including a magnetoresistive element and a switching transistor, which are connected in parallel, the magnetoresistive element being a spin injection type and including a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes, and a non-magnetic layer interposed between the fixed layer and the recording layer, a bit line connected to the first node via a selection transistor, a word line connected to a gate of the switching transistor, and a write line connected to the second node.