Spin-on Glass UV Blocking Layer for Semiconductor Fabrication
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Solution Overview
Problem
Existing UV radiation blocking techniques for semiconductor devices are difficult to etch, leading to long process times and undesirable etch profiles, and are not compatible with copper metallization, which poses issues in nonvolatile memory devices like EEPROM and flash memories.
Innovation Solution
A method involving the deposition of a spin-on glass layer that is substantially opaque to UV radiation, heated to less than 450°C, allowing for easy etching and compatibility with copper metallization, thereby preventing UV-induced charge generation in semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a UV radiation blocking insulator is deposited by chemical vapor deposition (CVD) overlying the gate structure, then UV radiation induced charge generation is prevented, but the blocking layer is difficult to etch leading to long process times and undesirable etch profiles
Solution Approach 1:
The patent changes the deposition method parameter from CVD to spin-on-glass, and controls the heating temperature parameter to be less than 450°C. This parameter change makes the blocking layer easy to etch while maintaining UV radiation blocking capability, thus reducing etching process time without compromising charge generation prevention
Solution Approach 2:
The spin-on-glass blocking layer is designed to be easily removed after serving its protective function. The layer is deposited temporarily to prevent UV-induced charge generation during fabrication, then easily etched away when no longer needed, avoiding long-term presence and simplifying subsequent processing
2Reliability
If a UV radiation blocking insulator is deposited by chemical vapor deposition (CVD) overlying the gate structure, then UV radiation induced charge generation is prevented, but the etch profile is undesirable
Solution Approach 1:
Changing the deposition method from CVD to spin-on-glass fundamentally alters the material properties of the blocking layer. This parameter change results in a layer with superior etchability and vertical sidewalls, producing desirable etch profiles with clean definitions and no tapering, thus improving manufacturing precision
3Reliability
If traditional UV blocking techniques are used, then charge accumulation on gate structures is prevented, but compatibility with copper metallization is lost
Solution Approach 1:
The patent changes the deposition temperature parameter to be less than 450°C, which is compatible with copper metallization processing requirements. This temperature parameter change allows the UV blocking layer to be integrated into copper-based工艺流程 without causing copper diffusion or degradation, thus achieving adaptability with copper metallization while maintaining charge accumulation prevention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively blocks UV radiation, preventing charge accumulation on gate structures and enabling efficient processing with copper metallization, thus ensuring accurate data storage in nonvolatile memory devices.
Implementation Method 1
depositing a layer of spin on glass overlying the gate electrode, the layer of spin on glass comprising a substantially UV opaque material
Implementation Method 2
The layer of spin on glass is heated to a temperature less than about 450° C.
Data Source
AI summary
A method is provided for fabricating a semiconductor device having a gate electrode overlying a gate insulator. The method, in accordance with one embodiment, comprises depositing a layer of spin on glass overlying the gate electrode, the layer of spin on glass comprising a substantially UV opaque material. The layer of spin on glass is heated to a temperature less than about 450° C., and all subsequent process steps in the fabrication of the device are limited to temperatures less than about 450° C.


