Spin-Orbit Torque Magnetic Memory Architecture for Low Write Error Rates

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Solution Overview

Problem

Conventional spin transfer torque random access memories (STT-RAMs) face challenges with high write error rates, especially at shorter write current pulses, and struggle to scale for next-generation nonvolatile memory requirements due to limitations in spin transfer torque and read signal cancellation.

Innovation Solution

A magnetic memory system utilizing spin-orbit interaction in conjunction with spin transfer torque, incorporating a hierarchical architecture with spin-orbit active layers adjacent to magnetic junctions, which exert spin-orbit torque to improve switching efficiency and reduce write error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional spin transfer torque is used for writing data in STT-RAM, then the memory achieves non-volatility and low power consumption, but the write error rate increases especially at shorter write current pulses

Engineering Contradiction:
Improvewrite error rateVSAvoidwrite current pulse duration
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent changes the physical mechanism parameter from pure spin transfer torque to spin-orbit torque by introducing heavy metal layers (Pt, Ta, W) adjacent to the magnetic tunneling junction. This parameter change enables effective switching at shorter pulse durations by utilizing the spin Hall effect, thereby reducing write error rates without requiring extended pulse widths.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces heavy metal layers as intermediary elements between the current path and the magnetic layer. These intermediary layers (Pt, Ta, W) generate spin-orbit torque that mediates the switching process, enabling more efficient and reliable writing operations at shorter pulse durations compared to direct spin transfer torque.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If conventional STT-RAM architecture is used, then the memory achieves fast read/write speed and non-volatility, but the read signal cancellation limits scalability for next-generation requirements

Engineering Contradiction:
ImprovescalabilityVSAvoidread signal cancellation
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent applies local quality by placing heavy metal layers specifically at strategic locations adjacent to the magnetic tunneling junction where they can generate localized spin-orbit torque. This localized approach enhances switching efficiency without affecting the overall read signal integrity, thereby improving scalability without read signal cancellation issues.

Inventive Principle:
Principle #3Local quality

3Productivity

If spin-orbit interaction is introduced to reduce write error rates, then the switching efficiency improves, but the device complexity increases

Engineering Contradiction:
Improveswitching efficiencyVSAvoidstructure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the heavy metal layer with the existing magnetic tunneling junction structure, combining multiple functions (current path, spin-orbit torque generation, and magnetic coupling) into an integrated structure. This merging approach improves switching efficiency while minimizing the increase in device complexity by utilizing existing fabrication processes.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system achieves reduced write error rates and faster switching times by leveraging spin-orbit interaction, enabling scalable and high-density magnetic memory solutions.

Implementation Method 1

at least part of a spin-orbit interaction (SO) active layer adjacent to the magnetic junction(s). The SO active layer is configured to exert a SO torque on at least part of the magnetic junction(s) due to an SO current passing through the SO active layer

Methodology Applied
Scientific EffectSpin-orbit interaction:

Implementation Method 2

A spin polarized current driven through the magnetic junction exerts a spin torque on the magnetic moments in the magnetic junction. As a result, layer(s) having magnetic moments that are responsive to the spin torque may be switched to a desired state

Methodology Applied
Scientific EffectSpin transfer torque:

Data Source

PatentUS9076541B2Architecture for magnetic memories including magnetic tunneling junctions using spin-orbit interaction based switching
Publication Date: 2015.07.07 SAMSUNG ELECTRONICS CO LTD
  • US9076541B2 patent drawing
  • US9076541B2 patent drawing
  • US9076541B2 patent drawing

AI summary

A magnetic memory includes memory array tiles (MATs), intermediate circuitry, global bit lines and global circuitry. Each MAT includes bit lines, word lines, and magnetic storage cells having magnetic junction(s), selection device(s) and at least part of a spin-orbit interaction (SO) active layer adjacent to the magnetic junction(s). The SO active layer exerts a SO torque on the magnetic junction(s) due to a preconditioning current passing through the SO active layer. The magnetic junction(s) are programmable using write current(s) driven through the magnetic junction(s) and the preconditioning current. The bit and word lines correspond to the magnetic storage cells. The intermediate circuitry controls read and write operations within the MATs. Each global bit line corresponds to a portion of the MATs. The global circuitry selects and drivesportions of the global bit lines for read operations and write operations.