Spin-Torque Magnetic Latch for Low-Power Fault-Tolerant Storage

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Solution Overview

Problem

Current computing devices face challenges in storing and manipulating data under harsh, power-constrained conditions, such as in aerospace applications, where existing technologies struggle with reliability and efficiency in data storage and manipulation.

Innovation Solution

A magnetic latching element with a five-layer stack structure, comprising ferromagnetic free layers, a fixed layer, and spacer layers, uses spin-dependent scattering and angular momentum transfer to achieve low-energy, low-power data latching, enabling non-volatile storage of binary values and their complements with high areal density and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CMOS technology is used for data storage and manipulation, then computing functionality is achieved, but reliability and efficiency deteriorate under harsh, power-constrained conditions

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces traditional CMOS electronic switching mechanisms with a magnetic domain wall-based memory system. Magnetic domain walls are manipulated through spin transfer torque from spin-polarized currents, enabling non-volatile data storage and logic operations that are inherently more reliable under radiation and power-constrained conditions while consuming less energy during data retention

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the fundamental operating parameter from voltage-based CMOS switching to current-based magnetic domain wall manipulation. By using spin-polarized currents to move domain walls and represent binary states, the system achieves lower power consumption during operation and maintains data without continuous power supply, improving reliability in harsh environments

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If data storage density is increased, then more information can be stored, but manufacturing precision requirements worsen

Engineering Contradiction:
Improvedata storage densityVSAvoidlayer thickness control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent transitions from planar 2D magnetic tunnel junction structures to three-dimensional magnetic domain wall structures that extend vertically through multiple spacer layers. This dimensional transition allows data to be encoded in the spatial position and orientation of domain walls along the vertical axis, significantly increasing storage density while using standard thin-film fabrication processes with existing precision capabilities

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If system complexity is reduced for harsh environment operation, then reliability improves, but functionality deteriorates

Engineering Contradiction:
Improvefault toleranceVSAvoiddata manipulation capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The magnetic domain wall memory structure serves multiple functions simultaneously: it provides non-volatile data storage, implements logic operations through domain wall interactions, enables data retrieval via read mechanisms, and offers radiation hardening through magnetic state stability. This multi-functionality is achieved within a single unified magnetic structure, maintaining fault tolerance while delivering comprehensive data manipulation capabilities needed for aerospace applications

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides low power consumption, improved system recovery, and high fault tolerance, enabling reliable data storage and manipulation with reduced energy usage and increased reliability, suitable for rad-hard and rad-soft CMOS latches.

Implementation Method 1

uses spin-dependent scattering and angular momentum transfer to achieve low-energy, low-power data latching

Methodology Applied
Scientific EffectSpin-dependent scattering:

Implementation Method 2

uses spin-dependent scattering and angular momentum transfer to achieve low-energy, low-power data latching

Methodology Applied
Scientific EffectAngular momentum transfer:

Implementation Method 3

a first free layer, the first free layer being capable of magnetic polarization using a first electrical current, a fixed layer, the fixed layer having a static magnetic polarization

Methodology Applied
Scientific EffectMagnetic polarization: Magnetism

Implementation Method 4

the binary value being represented by a resistance characteristic of the first spacer layer

Methodology Applied
Scientific EffectTunneling magnetoresistance: Magnetoresistance

Data Source

PatentUS9257970B1Magnetic latch
Publication Date: 2016.02.09 HONEYWELL INTERNATIONAL INC
  • US9257970B1 patent drawing
  • US9257970B1 patent drawing
  • US9257970B1 patent drawing

AI summary

A device includes a first free layer, the first free layer being capable of magnetic polarization using a first electrical current, a fixed layer, the fixed layer having a static magnetic polarization, and a first spacer layer disposed between the first free layer and the fixed layer. The device may also include a second free layer, the second free layer being capable of magnetic polarization using a second electrical current, and a second spacer layer disposed between the second free layer and the fixed layer, wherein the device is operable, via the first electrical current, to store a binary value, the binary value being represented by a resistance characteristic of the first spacer layer, and wherein the device is operable, via the second electrical current, to store a compliment of the binary value, the compliment being represented by a resistance characteristic of the second spacer layer.