P-Type Spinel Heteroepitaxy on β-Ga2O3 for Cleaner p-n Interfaces
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Solution Overview
Problem
The challenge of achieving well-matched p-type doping in β-Ga2O3 semiconductor structures is exacerbated by its complex monoclinic structure, making it difficult to find materials for epitaxial growth, and existing p-n heterojunctions with NiO or CuI suffer from lattice mismatch and scattering due to polycrystalline grain boundaries.
Innovation Solution
The creation of a p-n heteroepitaxial interface using off-axis sputtering to deposit p-type spinel materials like ZnGa2O4, ZnCo2O4, Cr2MnO4, or MgAl2O4 directly on a Ga2O3 substrate, which are doped with Li or Cr for controlled p-type behavior, allowing for epitaxial growth and reducing grain boundaries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If p-n heterojunctions are created using NiO or CuI as the p-type layer, then p-n heterojunction functionality is achieved, but lattice mismatch and polycrystalline grain boundaries cause scattering and reduce interface quality
Solution Approach 1:
The patent changes the material parameters by selecting spinel structures with specific lattice constants that better match Ga2O3, and controls deposition parameters through off-axis sputtering to achieve epitaxial growth rather than polycrystalline formation, thereby reducing grain boundaries and improving interface quality
Solution Approach 2:
The patent introduces spinel materials as an intermediary p-type layer that serves as a bridge between the n-type Ga2O3 and the required p-type functionality, with the spinel's crystal structure acting as a mediating interface that reduces lattice mismatch and scattering
2Manufacturing precision
If epitaxial growth is attempted on β-Ga2O3, then interface quality improves, but the complex monoclinic structure of β-Ga2O3 makes it difficult to find suitable materials
Solution Approach 1:
The patent changes the crystallographic parameters by identifying specific planes of the monoclinic Ga2O3 structure that can accommodate spinel materials, and adjusts the lattice matching parameters by selecting from multiple spinel compositions to achieve compatible growth conditions
Solution Approach 2:
The patent employs composite material strategies by combining different spinel compositions (ZnGa2O4, ZnCo2O4, Cr2MnO4, MgAl2O4, ZnRh2O4) with Ga2O3 to create heteroepitaxial structures that leverage the advantageous properties of both materials while achieving lattice compatibility
3Reliability
If p-type doping is attempted in β-Ga2O3, then p-type conductivity is achieved, but the complex structure and lack of well-matched dopant pairs make effective p-type doping challenging
Solution Approach 1:
The patent uses spinel materials as an intermediary p-type doped layer that provides the required hole conductivity without requiring direct p-type doping of the Ga2O3, thereby simplifying the doping process while achieving the desired p-n junction functionality
Solution Approach 2:
The patent changes the doping approach by transitioning from attempting to dope Ga2O3 directly to depositing pre-doped spinel materials with controlled p-type characteristics, thereby achieving reliable p-type conductivity through material selection rather than complex doping processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method facilitates a cleaner interface for carrier transfer and improves the performance of semiconductor devices by reducing scattering at the junction, enabling better device functionality.
Implementation Method 1
depositing, via off-axis sputtering, an epitaxial layer of p-type spinel on a gallium oxide (Ga2O3) substrate
Implementation Method 2
creating a p-n heteroepitaxial interface between the p-type spinel and the Ga2O3 substrate
Data Source
AI summary
Spinel and gallium oxide (Ga2O3) p-n heteroepitaxial interfaces and methods of making the same are presented. In embodiments, a method of manufacturing spinel structures includes depositing, via off-axis sputtering, an epitaxial layer of p-type spinel on a gallium oxide (Ga2O3) substrate, thereby creating a p-n heteroepitaxial interface between the p-type spinel and the Ga2O3 substrate. In implementations, a semiconductor device includes a Ga2O3 substrate; a p-type spinel epitaxial layer formed directly on a surface of the Ga2O3 substrate, thereby forming a p-n heteroepitaxial interface; and electrodes.