Spiral Double-Surround Capacitor Layout for Higher Capacitance Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated chips face challenges in maximizing capacitance within a limited layout area due to the conventional design of capacitors, which restricts their functional capabilities in analog and digital circuitry.
Innovation Solution
The design of a double surround capacitor structure with spiral or polygonal patterns for the electrodes, where the first and second electrodes are not directly connected but surround each other, increasing the effective area and capacitance value without increasing the layout area, by using a dielectric material between them.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional capacitor design is used, then layout area is reduced, but capacitance value is limited
Solution Approach 1:
The patent implements a double surround capacitor structure where a first electrode and a second electrode are nested around each other in a spiral or polygonal pattern. The first electrode is surrounded by the second electrode, which is in turn surrounded by the first electrode, creating a nested configuration that maximizes the overlapping area between electrodes within a compact layout, thereby increasing capacitance without proportionally increasing layout area.
Solution Approach 2:
The patent transitions from conventional planar capacitor designs to a multi-dimensional nested surround structure. By arranging electrodes in concentric spiral or polygonal patterns that extend in multiple directions around a central point, the design utilizes spatial arrangement in additional dimensions to increase the effective overlapping area between electrodes, thereby achieving higher capacitance density within the same layout footprint.
2Quantity of substance
If electrode overlapping area is increased, then capacitance value increases, but layout area increases
Solution Approach 1:
The nested surround configuration allows multiple electrode turns to overlap efficiently in a compact radial pattern. Each successive turn of the spiral or polygonal electrodes overlaps with previous turns, creating multiple capacitive coupling regions within a small radial distance from the center, thereby achieving high total overlapping area without proportional increase in layout area.
Solution Approach 2:
The patent employs spiral and curved polygonal patterns for the electrodes instead of straight linear arrangements. These curved paths allow the electrodes to pack more densely and create continuous overlapping regions around the center point, maximizing the effective overlapping area within a compact circular or polygonal footprint, thereby increasing capacitance without proportionally increasing layout area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances capacitance values within the same layout area, enabling improved performance in integrated circuits by optimizing space utilization and increasing the capacitance of semiconductor devices.
Implementation Method 1
using a dielectric material between them
Data Source
AI summary
A capacitor includes a first spiral electrode and a second spiral electrode. The first spiral electrode is over a substrate. The second spiral electrode is over the substrate and is concentric with the first spiral electrode. A first turn of the second spiral electrode connecting to a spiral center of the second spiral electrode is free of a via thereon.