Spiral Inductor Dummy Patterns for Stress Relief

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Solution Overview

Problem

In semiconductor package manufacturing, spiral inductors face challenges in maintaining high quality and reliability due to stress concentration on conductive lines, leading to potential cracks and delamination issues during the manufacturing process.

Innovation Solution

The implementation of dummy patterns around the conductive lines at the first wiring level, which disperses stress and prevents crack generation, using a simple manufacturing process that integrates the formation of conductive lines and dummy patterns without additional steps, resulting in a robust and efficient inductor design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If spiral inductors are implemented in semiconductor packages, then communication circuit functionality is achieved, but stress concentration on conductive lines occurs leading to cracks and delamination

Engineering Contradiction:
Improvecommunication circuit functionalityVSAvoidinductor reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Dummy patterns are formed in advance at the first wiring level before the spiral inductor is fabricated. These pre-positioned dummy patterns serve as stress distribution elements that prevent crack propagation and delamination in the conductive lines during subsequent manufacturing processes and operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy patterns are strategically placed only in specific regions where stress concentration is most critical - namely at the first wiring level beneath the spiral inductor structure. This localized approach distributes stress in problem areas without affecting other regions of the device, maintaining overall functionality while improving reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If dummy patterns are added to disperse stress, then inductor reliability improves, but manufacturing process complexity increases

Engineering Contradiction:
Improveinductor reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy patterns are integrated into the existing first wiring level structure during the standard semiconductor manufacturing process. By combining the dummy pattern formation with the existing wiring layer fabrication, no additional manufacturing steps are required, thus improving reliability without increasing process complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The first wiring level serves dual functions: it provides the conductive interconnect structure necessary for device operation and simultaneously hosts the dummy patterns for stress management. This multi-functionality eliminates the need for separate dummy pattern fabrication steps, maintaining manufacturing simplicity while achieving reliability improvements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If dummy patterns are arranged in the first area defined by the innermost turn, then stress concentration is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvestress distributionVSAvoiddummy pattern positioning precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The dummy patterns are designed with specific geometric parameters including area ratios between 10-50% of the total first area, and positioning within 0.5-2.0 times the conductor width from the innermost turn. These optimized parameters ensure effective stress distribution while being achievable with standard manufacturing tolerances, avoiding excessive precision requirements.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230066895A1Inductor and semiconductor package including the same
Publication Date: 2023.03.02 SAMSUNG ELECTRONICS CO LTD
  • US20230066895A1 patent drawing
  • US20230066895A1 patent drawing
  • US20230066895A1 patent drawing

AI summary

An inductor includes a semiconductor substrate provided with a plurality of wiring levels including a first wiring level and a second wiring level, a straight conductive line, at the first wiring level of the semiconductor substrate, having a first end, a conductive coil of a spiral pattern, at the second wiring level over the first wiring level, having a second end, and a conductive via vertically connecting the first end of the straight conductive line to the second end of the conductive coil. When viewed in a plan view, a plurality of dummy patterns are arranged in a first area defined by an innermost turn of the spiral pattern.